mirror/libcpuid
1
0
Fork 0
mirror of https://github.com/anrieff/libcpuid synced 2024-12-16 16:35:45 +00:00
Code Issues Releases Wiki Activity

DB: minor update for Intel Arrandale

Browse source
This commit is contained in:
The Tumultuous Unicorn Of Darkness 2023-05-08 21:34:26 +02:00
parent e0f02b8d4f
commit 1cac5b3eb0
No known key found for this signature in database
GPG key ID: 1E55EE2EFF18BC1A
2 changed files with 3 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
libcpuid/recog_intel.c
View file

@ -273,10 +273,11 @@ const struct match_entry_t cpudb_intel[] = {
{ 6, 12, -1, -1, 44, 4, -1, 12288, NC, CORE_|_I_|_7 , 0, "Gulftown (Core i7)" },
{ 6, 5, -1, -1, 37, 2, -1, 4096, NC, CORE_|_I_|_5 , 0, "Clarkdale (Core i5)" },
{ 6, 5, -1, -1, 37, 2, -1, 4096, NC, CORE_|_I_|_3 , 0, "Clarkdale (Core i3)" },
{ 6, 5, -1, -1, 37, 2, -1, -1, NC, PENTIUM_ , 0, "Arrandale" },
{ 6, 5, -1, -1, 37, 2, -1, 4096, NC, CORE_|_I_|_7 , 0, "Arrandale (Core i7)" },
{ 6, 5, -1, -1, 37, 2, -1, 3072, NC, CORE_|_I_|_5 , 0, "Arrandale (Core i5)" },
{ 6, 5, -1, -1, 37, 2, -1, 3072, NC, CORE_|_I_|_3 , 0, "Arrandale (Core i3)" },
{ 6, 5, -1, -1, 37, 2, -1, -1, NC, PENTIUM_ , 0, "Arrandale (Pentium)" },
{ 6, 5, -1, -1, 37, 2, -1, -1, NC, CELERON_ , 0, "Arrandale (Celeron)" },
/* Sandy Bridge CPUs (2nd gen, 32nm): */
{ 6, 10, -1, -1, 42, -1, -1, -1, NC, 0 , 0, "Unknown Sandy Bridge" },

2
tests/intel/x86-64/nehalem/arrandale-pentium.test
View file

@ -101,5 +101,5 @@ general
-1
-1
128 (non-authoritative)
Arrandale
Arrandale (Pentium)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xd popcnt rdtscp lm lahf_lm constant_tsc