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Add L1 Instruction Cache information

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Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119
It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t
To avoid confusing, also adds l1_data_assoc and l1_data_cacheline
l1_assoc and l1_cacheline are leave untouched for backward compatibility
This commit is contained in:
Xorg 2020-05-10 11:47:43 +02:00
commit 25d0614811
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GPG key ID: 1E55EE2EFF18BC1A
5 changed files with 54 additions and 15 deletions
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8
libcpuid/cpuid_main.c
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@ -55,8 +55,8 @@ static void cpu_id_t_constructor(struct cpu_id_t* id)
{
memset(id, 0, sizeof(struct cpu_id_t));
id->l1_data_cache = id->l1_instruction_cache = id->l2_cache = id->l3_cache = id->l4_cache = -1;
id->l1_assoc = id->l2_assoc = id->l3_assoc = id->l4_assoc = -1;
id->l1_cacheline = id->l2_cacheline = id->l3_cacheline = id->l4_cacheline = -1;
id->l1_assoc = id->l1_data_assoc = id->l1_instruction_assoc = id->l2_assoc = id->l3_assoc = id->l4_assoc = -1;
id->l1_cacheline = id->l1_data_cacheline = id->l1_instruction_cacheline = id->l2_cacheline = id->l3_cacheline = id->l4_cacheline = -1;
id->sse_size = -1;
}
@ -548,6 +548,10 @@ int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data, struct
default:
break;
}
/* Backward compatibility */
/* - Deprecated since v0.5.0 */
data->l1_assoc = data->l1_data_assoc;
data->l1_cacheline = data->l1_data_cacheline;
return set_error(r);
}