From d8a273f17acc17d2fba5b5fdb2cd42e2c093b19f Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 08:52:33 +0200 Subject: [PATCH 1/6] DB: Add more Raven Ridge https://en.wikichip.org/wiki/amd/cores/raven_ridge#Raven_Ridge_Processors --- libcpuid/recog_amd.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index 714e43d..ce958e4 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -50,9 +50,12 @@ enum _amd_model_codes_t { _1500, _1600, _1900, + _2200, _2400, _2500, + _2600, _2700, + _2800, }; @@ -283,11 +286,14 @@ const struct match_entry_t cpudb_amd[] = { { 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , _1400, "Ryzen 5 (Summit Ridge)" }, { 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Summit Ridge)" }, /* APUs */ + { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2800, "Ryzen 7 (Raven Ridge)" }, { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2700, "Ryzen 7 (Raven Ridge)" }, + { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2600, "Ryzen 5 (Raven Ridge)" }, { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2500, "Ryzen 5 (Raven Ridge)" }, { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2400, "Ryzen 5 (Raven Ridge)" }, { 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Raven Ridge)" }, - { 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , 0, "Ryzen 3 (Raven Ridge)" }, + { 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , _2200, "Ryzen 3 (Raven Ridge)" }, + { 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , 0, "Athlon (Raven Ridge)" }, /* 2nd-gen, Zen+ (2018): */ { 15, -1, -1, 23, 8, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Pinnacle Ridge)" }, { 15, -1, -1, 23, 8, 6, -1, -1, NC, 0 , 0, "Ryzen 5 (Pinnacle Ridge)" }, From 21c5d3512b11e31550a81c687e98cc7e31d9e8c0 Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 08:57:29 +0200 Subject: [PATCH 2/6] DB: Add more Pinnacle Ridge https://en.wikichip.org/wiki/amd/cores/pinnacle_ridge#Pinnacle_Ridge_Processors --- libcpuid/recog_amd.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index ce958e4..be30a36 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -297,6 +297,8 @@ const struct match_entry_t cpudb_amd[] = { /* 2nd-gen, Zen+ (2018): */ { 15, -1, -1, 23, 8, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Pinnacle Ridge)" }, { 15, -1, -1, 23, 8, 6, -1, -1, NC, 0 , 0, "Ryzen 5 (Pinnacle Ridge)" }, + { 15, -1, -1, 23, 8, 4, -1, -1, NC, 0 , _2500, "Ryzen 5 (Pinnacle Ridge)" }, + { 15, -1, -1, 23, 8, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Pinnacle Ridge)" }, /* Newer Opterons: */ From 62405e235c33ac5aecd5f0b4536b458ad9341557 Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 09:09:12 +0200 Subject: [PATCH 3/6] DB: Fix Threadripper codename According to WikiChip, Whitehaven is used for Ryzen Threadripper https://en.wikichip.org/wiki/amd/cores/whitehaven --- libcpuid/recog_amd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index be30a36..b71672d 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -277,9 +277,9 @@ const struct match_entry_t cpudb_amd[] = { { 15, 0, -1, 22, 48, 4, -1, -1, FUSION_A, 0 , 0, "Mullins X4" }, /* Family 17h: Zen Architecture (2017) */ - { 15, -1, -1, 23, 1, 16, -1, -1, NC, 0 , 0, "Threadripper (Summit Ridge)" }, - { 15, -1, -1, 23, 1, 12, -1, -1, NC, 0 , 0, "Threadripper (Summit Ridge)" }, - { 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , _1900, "Threadripper (Summit Ridge)" }, + { 15, -1, -1, 23, 1, 16, -1, -1, NC, 0 , 0, "Threadripper (Whitehaven)" }, + { 15, -1, -1, 23, 1, 12, -1, -1, NC, 0 , 0, "Threadripper (Whitehaven)" }, + { 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , _1900, "Threadripper (Whitehaven)" }, { 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Summit Ridge)" }, { 15, -1, -1, 23, 1, 6, -1, -1, NC, 0 , _1600, "Ryzen 5 (Summit Ridge)" }, { 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , _1500, "Ryzen 5 (Summit Ridge)" }, From bbafbb7ac42f4372857dbd85e3422db138386f94 Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 09:15:21 +0200 Subject: [PATCH 4/6] DB: Add Zen+ Threadripper (Colfax) https://en.wikichip.org/wiki/amd/cores/colfax#Colfax_Processors --- libcpuid/recog_amd.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index b71672d..fe8a952 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -295,6 +295,10 @@ const struct match_entry_t cpudb_amd[] = { { 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , _2200, "Ryzen 3 (Raven Ridge)" }, { 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , 0, "Athlon (Raven Ridge)" }, /* 2nd-gen, Zen+ (2018): */ + { 15, -1, -1, 23, 8, 32, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" }, + { 15, -1, -1, 23, 8, 24, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" }, + { 15, -1, -1, 23, 8, 16, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" }, + { 15, -1, -1, 23, 8, 12, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" }, { 15, -1, -1, 23, 8, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Pinnacle Ridge)" }, { 15, -1, -1, 23, 8, 6, -1, -1, NC, 0 , 0, "Ryzen 5 (Pinnacle Ridge)" }, { 15, -1, -1, 23, 8, 4, -1, -1, NC, 0 , _2500, "Ryzen 5 (Pinnacle Ridge)" }, From 5187986bd16d3b833ca059ca1d3dc8ac55132f2b Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 09:36:07 +0200 Subject: [PATCH 5/6] DB: Add more Coffee Lake Coffee Lake S: https://en.wikichip.org/wiki/intel/cores/coffee_lake_s#Coffee_Lake_S_Processors Coffee Lake Refresh: https://en.wikichip.org/wiki/intel/cores/coffee_lake_r --- libcpuid/recog_intel.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/libcpuid/recog_intel.c b/libcpuid/recog_intel.c index d683a26..9880f01 100644 --- a/libcpuid/recog_intel.c +++ b/libcpuid/recog_intel.c @@ -348,11 +348,15 @@ const struct match_entry_t cpudb_intel[] = { { 6, 14, -1, -1, 142, 2, -1, -1, NC, CELERON_ , 0, "Kaby Lake-U (Celeron)" }, { 6, 14, -1, -1, 142, 2, -1, -1, NC, CORE_|_M_|_3 , 0, "Kaby Lake-U (Core m3)" }, - /* Coffee Lake CPUs (14nm): */ + { 6, 14, -1, -1, 158, 8, -1, -1, NC, CORE_|_I_|_9 , 0, "Coffee Lake (Core i9)" }, + { 6, 14, -1, -1, 158, 8, -1, -1, NC, CORE_|_I_|_7 , 0, "Coffee Lake (Core i7)" }, { 6, 14, -1, -1, 158, 6, -1, -1, NC, CORE_|_I_|_7 , 0, "Coffee Lake (Core i7)" }, { 6, 14, -1, -1, 158, 6, -1, -1, NC, CORE_|_I_|_5 , 0, "Coffee Lake (Core i5)" }, { 6, 14, -1, -1, 158, 4, -1, -1, NC, CORE_|_I_|_3 , 0, "Coffee Lake (Core i3)" }, + { 6, 14, -1, -1, 158, 2, -1, -1, NC, PENTIUM_ , 0, "Coffee Lake (Pentium)" }, + { 6, 14, -1, -1, 158, 2, -1, -1, NC, CELERON_ , 0, "Coffee Lake (Celeron)" }, + /* Itaniums */ { 7, -1, -1, -1, -1, 1, -1, -1, NC, 0 , 0, "Itanium" }, From ee32a4a7357083e7e9e47bd3ef52937f5d984453 Mon Sep 17 00:00:00 2001 From: Xorg Date: Sun, 21 Oct 2018 09:59:15 +0200 Subject: [PATCH 6/6] DB: Add missing patterns in decode_amd_ryzen_model_code() Forgotten in d8a273f17acc17d2fba5b5fdb2cd42e2c093b19f --- libcpuid/recog_amd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index fe8a952..b9764b3 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -495,9 +495,12 @@ static int decode_amd_ryzen_model_code(const char* bs) int model_code; const char* match_str; } patterns[] = { + { _2800, "2800" }, { _2700, "2700" }, + { _2600, "2600" }, { _2500, "2500" }, { _2400, "2400" }, + { _2200, "2200" }, { _1900, "1900" }, { _1600, "1600" }, { _1500, "1500" },