From 3a977a4f99064814fc0eb73dfde54b1a22fbe1ab Mon Sep 17 00:00:00 2001 From: Veselin Georgiev Date: Tue, 17 May 2016 21:35:55 +0300 Subject: [PATCH] Add detection support for the AMD TBM instructions. Update Vishera test. --- libcpuid/recog_amd.c | 1 + tests/amd/bulldozer/vishera-x4.test | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c index 668d49b..c1db973 100644 --- a/libcpuid/recog_amd.c +++ b/libcpuid/recog_amd.c @@ -295,6 +295,7 @@ static void load_amd_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data) { 12, CPU_FEATURE_SKINIT }, { 13, CPU_FEATURE_WDT }, { 16, CPU_FEATURE_FMA4 }, + { 21, CPU_FEATURE_TBM }, }; const struct feature_map_t matchtable_edx87[] = { { 0, CPU_FEATURE_TS }, diff --git a/tests/amd/bulldozer/vishera-x4.test b/tests/amd/bulldozer/vishera-x4.test index 3e99cb7..a8002b2 100644 --- a/tests/amd/bulldozer/vishera-x4.test +++ b/tests/amd/bulldozer/vishera-x4.test @@ -90,4 +90,4 @@ intel_fn11[3]=00000000 00000000 00000000 00000000 64 128 (authoritative) Vishera X4 -fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 f16c cpb aperfmperf bmi1 +fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 tbm f16c cpb aperfmperf bmi1