1
0
Fork 0
mirror of https://github.com/anrieff/libcpuid synced 2025-10-03 11:01:30 +00:00

Detect x2APIC and AVX512 for AMD CPUs and update tests

AVX512 is supported since Zen 4, meaning all Zen 4 CPUs are x86-64-v4.
x2APIC and AVX512 are present in 'Processor Programming Reference (PPR) for AMD Family 19h Model 11h, Revision B1'.
This commit is contained in:
The Tumultuous Unicorn Of Darkness 2024-08-25 20:49:56 +02:00
commit 3b8b7dfaf8
No known key found for this signature in database
GPG key ID: 1E55EE2EFF18BC1A
27 changed files with 56 additions and 48 deletions

View file

@ -969,6 +969,7 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
{ 13, CPU_FEATURE_CX16 },
{ 19, CPU_FEATURE_SSE4_1 },
{ 20, CPU_FEATURE_SSE4_2 },
{ 21, CPU_FEATURE_X2APIC },
{ 22, CPU_FEATURE_MOVBE },
{ 23, CPU_FEATURE_POPCNT },
{ 25, CPU_FEATURE_AES },
@ -983,9 +984,19 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
{ 3, CPU_FEATURE_BMI1 },
{ 5, CPU_FEATURE_AVX2 },
{ 8, CPU_FEATURE_BMI2 },
{ 16, CPU_FEATURE_AVX512F },
{ 17, CPU_FEATURE_AVX512DQ },
{ 18, CPU_FEATURE_RDSEED },
{ 19, CPU_FEATURE_ADX },
{ 28, CPU_FEATURE_AVX512CD },
{ 29, CPU_FEATURE_SHA_NI },
{ 30, CPU_FEATURE_AVX512BW },
{ 31, CPU_FEATURE_AVX512VL },
};
const struct feature_map_t matchtable_ecx7[] = {
{ 1, CPU_FEATURE_AVX512VBMI },
{ 6, CPU_FEATURE_AVX512VBMI2 },
{ 11, CPU_FEATURE_AVX512VNNI },
};
const struct feature_map_t matchtable_edx81[] = {
{ 11, CPU_FEATURE_SYSCALL },
@ -1005,6 +1016,7 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
}
if (raw->basic_cpuid[0][EAX] >= 7) {
match_features(matchtable_ebx7, COUNT_OF(matchtable_ebx7), raw->basic_cpuid[7][EBX], data);
match_features(matchtable_ecx7, COUNT_OF(matchtable_ecx7), raw->basic_cpuid[7][ECX], data);
}
if (raw->ext_cpuid[0][EAX] >= 0x80000001) {
match_features(matchtable_edx81, COUNT_OF(matchtable_edx81), raw->ext_cpuid[1][EDX], data);

View file

@ -582,7 +582,7 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
{ 14, CPU_FEATURE_XTPR },
{ 15, CPU_FEATURE_PDCM },
{ 18, CPU_FEATURE_DCA },
{ 21, CPU_FEATURE_X2APIC },
/* id 21 is handled in common */
};
const struct feature_map_t matchtable_edx81[] = {
{ 20, CPU_FEATURE_XD },
@ -591,21 +591,12 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
{ 2, CPU_FEATURE_SGX },
{ 4, CPU_FEATURE_HLE },
{ 11, CPU_FEATURE_RTM },
{ 16, CPU_FEATURE_AVX512F },
{ 17, CPU_FEATURE_AVX512DQ },
/* id 18 and 19 are handled in common */
/* id 16 to 19 are handled in common */
{ 26, CPU_FEATURE_AVX512PF },
{ 27, CPU_FEATURE_AVX512ER },
{ 28, CPU_FEATURE_AVX512CD },
/* id 29 is handled in common */
{ 30, CPU_FEATURE_AVX512BW },
{ 31, CPU_FEATURE_AVX512VL },
};
const struct feature_map_t matchtable_ecx7[] = {
{ 1, CPU_FEATURE_AVX512VBMI },
{ 6, CPU_FEATURE_AVX512VBMI2 },
{ 11, CPU_FEATURE_AVX512VNNI },
/* id 28 to 31 are handled in common */
};
if (raw->basic_cpuid[0][EAX] >= 1) {
match_features(matchtable_edx1, COUNT_OF(matchtable_edx1), raw->basic_cpuid[1][EDX], data);
match_features(matchtable_ecx1, COUNT_OF(matchtable_ecx1), raw->basic_cpuid[1][ECX], data);
@ -616,7 +607,6 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
// detect TSX/AVX512:
if (raw->basic_cpuid[0][EAX] >= 7) {
match_features(matchtable_ebx7, COUNT_OF(matchtable_ebx7), raw->basic_cpuid[7][EBX], data);
match_features(matchtable_ecx7, COUNT_OF(matchtable_ecx7), raw->basic_cpuid[7][ECX], data);
}
}