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Detect x2APIC and AVX512 for AMD CPUs and update tests
AVX512 is supported since Zen 4, meaning all Zen 4 CPUs are x86-64-v4. x2APIC and AVX512 are present in 'Processor Programming Reference (PPR) for AMD Family 19h Model 11h, Revision B1'.
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27 changed files with 56 additions and 48 deletions
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@ -969,6 +969,7 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
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{ 13, CPU_FEATURE_CX16 },
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{ 19, CPU_FEATURE_SSE4_1 },
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{ 20, CPU_FEATURE_SSE4_2 },
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{ 21, CPU_FEATURE_X2APIC },
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{ 22, CPU_FEATURE_MOVBE },
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{ 23, CPU_FEATURE_POPCNT },
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{ 25, CPU_FEATURE_AES },
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@ -983,9 +984,19 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
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{ 3, CPU_FEATURE_BMI1 },
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{ 5, CPU_FEATURE_AVX2 },
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{ 8, CPU_FEATURE_BMI2 },
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{ 16, CPU_FEATURE_AVX512F },
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{ 17, CPU_FEATURE_AVX512DQ },
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{ 18, CPU_FEATURE_RDSEED },
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{ 19, CPU_FEATURE_ADX },
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{ 28, CPU_FEATURE_AVX512CD },
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{ 29, CPU_FEATURE_SHA_NI },
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{ 30, CPU_FEATURE_AVX512BW },
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{ 31, CPU_FEATURE_AVX512VL },
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};
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const struct feature_map_t matchtable_ecx7[] = {
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{ 1, CPU_FEATURE_AVX512VBMI },
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{ 6, CPU_FEATURE_AVX512VBMI2 },
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{ 11, CPU_FEATURE_AVX512VNNI },
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};
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const struct feature_map_t matchtable_edx81[] = {
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{ 11, CPU_FEATURE_SYSCALL },
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@ -1005,6 +1016,7 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
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}
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if (raw->basic_cpuid[0][EAX] >= 7) {
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match_features(matchtable_ebx7, COUNT_OF(matchtable_ebx7), raw->basic_cpuid[7][EBX], data);
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match_features(matchtable_ecx7, COUNT_OF(matchtable_ecx7), raw->basic_cpuid[7][ECX], data);
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}
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if (raw->ext_cpuid[0][EAX] >= 0x80000001) {
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match_features(matchtable_edx81, COUNT_OF(matchtable_edx81), raw->ext_cpuid[1][EDX], data);
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@ -582,7 +582,7 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
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{ 14, CPU_FEATURE_XTPR },
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{ 15, CPU_FEATURE_PDCM },
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{ 18, CPU_FEATURE_DCA },
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{ 21, CPU_FEATURE_X2APIC },
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/* id 21 is handled in common */
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};
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const struct feature_map_t matchtable_edx81[] = {
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{ 20, CPU_FEATURE_XD },
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@ -591,21 +591,12 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
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{ 2, CPU_FEATURE_SGX },
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{ 4, CPU_FEATURE_HLE },
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{ 11, CPU_FEATURE_RTM },
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{ 16, CPU_FEATURE_AVX512F },
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{ 17, CPU_FEATURE_AVX512DQ },
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/* id 18 and 19 are handled in common */
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/* id 16 to 19 are handled in common */
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{ 26, CPU_FEATURE_AVX512PF },
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{ 27, CPU_FEATURE_AVX512ER },
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{ 28, CPU_FEATURE_AVX512CD },
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/* id 29 is handled in common */
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{ 30, CPU_FEATURE_AVX512BW },
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{ 31, CPU_FEATURE_AVX512VL },
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};
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const struct feature_map_t matchtable_ecx7[] = {
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{ 1, CPU_FEATURE_AVX512VBMI },
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{ 6, CPU_FEATURE_AVX512VBMI2 },
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{ 11, CPU_FEATURE_AVX512VNNI },
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/* id 28 to 31 are handled in common */
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};
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if (raw->basic_cpuid[0][EAX] >= 1) {
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match_features(matchtable_edx1, COUNT_OF(matchtable_edx1), raw->basic_cpuid[1][EDX], data);
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match_features(matchtable_ecx1, COUNT_OF(matchtable_ecx1), raw->basic_cpuid[1][ECX], data);
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@ -616,7 +607,6 @@ static void load_intel_features(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
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// detect TSX/AVX512:
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if (raw->basic_cpuid[0][EAX] >= 7) {
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match_features(matchtable_ebx7, COUNT_OF(matchtable_ebx7), raw->basic_cpuid[7][EBX], data);
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match_features(matchtable_ecx7, COUNT_OF(matchtable_ecx7), raw->basic_cpuid[7][ECX], data);
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}
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}
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