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Fixed a detection for Turion Griffin - it's ext_family is not 23, it's 17.
Also, the sse-width guesswork seems to handle this (wrong) Griffin ext_family explicitly, so fix it there as well. Seems that members of ext_family 20 (AMD Fusion based APUs) also are 64-bit, but they have the authoritative sse width detection bit, so we don't need to handle them explicitly here.
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2 changed files with 3 additions and 3 deletions
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@ -202,7 +202,7 @@ static void load_features_common(struct cpu_raw_data_t* raw, struct cpu_id_t* da
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/* apply guesswork to check if the SSE unit width is 128 bit */
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switch (data->vendor) {
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case VENDOR_AMD:
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data->sse_size = (data->ext_family >= 16 && data->ext_family != 23) ? 128 : 64;
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data->sse_size = (data->ext_family >= 16 && data->ext_family != 17) ? 128 : 64;
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break;
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case VENDOR_INTEL:
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data->sse_size = (data->family == 6 && data->ext_model >= 15) ? 128 : 64;
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@ -212,8 +212,8 @@ const struct match_entry_t cpudb_amd[] = {
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{ 15, -1, -1, 15, 0x4c, 1, 512, -1, TURION_64 , 0, "Turion 64 (Richmond)" },
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{ 15, -1, -1, 15, 0x68, 2, 256, -1, TURION_X2 , 0, "Turion X2 (Tyler/256K)" },
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{ 15, -1, -1, 15, 0x68, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Tyler/512K)" },
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{ 15, -1, -1, 23, 3, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Griffin/512K)" },
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{ 15, -1, -1, 23, 3, 2, 1024, -1, TURION_X2 , 0, "Turion X2 (Griffin/1024K)" },
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{ 15, -1, -1, 17, 3, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Griffin/512K)" },
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{ 15, -1, -1, 17, 3, 2, 1024, -1, TURION_X2 , 0, "Turion X2 (Griffin/1024K)" },
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/* K9 Architecture */
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{ 15, -1, -1, 16, -1, 1, -1, -1, PHENOM , 0, "Unknown AMD Phenom" },
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