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https://github.com/anrieff/libcpuid
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3bcb6fb72b
commit
52dbcb0493
1 changed files with 5 additions and 2 deletions
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@ -649,6 +649,10 @@ void cpuid_get_list_amd(struct cpu_list_t* list)
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cpu_purpose_t cpuid_identify_purpose_amd(struct cpu_raw_data_t* raw)
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cpu_purpose_t cpuid_identify_purpose_amd(struct cpu_raw_data_t* raw)
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{
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{
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//FIXME: ext_cpuid[0x26] => index 38 is past the end of the array (which contains 32 elements)
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//TODO: leaf CPUID_Fn80000026 needs to be added in cpu_raw_data_t
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(void)(raw);
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#if 0
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/* Check for hybrid architecture
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/* Check for hybrid architecture
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From Processor Programming Reference (PPR) for AMD Family 19h Model 70h, Revision A0 Processors
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From Processor Programming Reference (PPR) for AMD Family 19h Model 70h, Revision A0 Processors
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Available at https://www.amd.com/system/files/TechDocs/57019-A0-PUB_3.00.zip
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Available at https://www.amd.com/system/files/TechDocs/57019-A0-PUB_3.00.zip
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@ -659,7 +663,6 @@ cpu_purpose_t cpuid_identify_purpose_amd(struct cpu_raw_data_t* raw)
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- CPUID_Fn80000026_EBX [Extended CPU Topology][31:28] is CoreType.
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- CPUID_Fn80000026_EBX [Extended CPU Topology][31:28] is CoreType.
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Only valid while LevelType=Core.
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Only valid while LevelType=Core.
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*/
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*/
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//FIXME: leaf CPUID_Fn80000026 needs to be added in cpu_raw_data_t
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if (EXTRACTS_BITS(raw->ext_cpuid[0x26][ECX], 15, 8) == 0x1) {
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if (EXTRACTS_BITS(raw->ext_cpuid[0x26][ECX], 15, 8) == 0x1) {
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debugf(3, "Detected AMD CPU hybrid architecture\n");
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debugf(3, "Detected AMD CPU hybrid architecture\n");
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switch (EXTRACTS_BITS(raw->ext_cpuid[0x26][EBX], 31, 28)) {
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switch (EXTRACTS_BITS(raw->ext_cpuid[0x26][EBX], 31, 28)) {
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@ -668,6 +671,6 @@ cpu_purpose_t cpuid_identify_purpose_amd(struct cpu_raw_data_t* raw)
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default: return PURPOSE_GENERAL;
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default: return PURPOSE_GENERAL;
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}
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}
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}
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}
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#endif
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return PURPOSE_GENERAL;
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return PURPOSE_GENERAL;
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}
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}
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