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RDMSR: support for AMD 19h family
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1 changed files with 22 additions and 7 deletions
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@ -659,8 +659,9 @@ static int get_amd_multipliers(struct msr_info_t *info, uint32_t pstate, double
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if (pstate < MSR_PSTATE_0 || MSR_PSTATE_7 < pstate)
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return 1;
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/* Overview of AMD CPU microarchitectures: https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures#Nomenclature */
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switch (info->id->ext_family) {
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case 0x12:
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case 0x12: /* K10 (Llano) / K12 */
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/* BKDG 12h, page 469
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MSRC001_00[6B:64][8:4] is CpuFid
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MSRC001_00[6B:64][3:0] is CpuDid
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@ -676,7 +677,7 @@ static int get_amd_multipliers(struct msr_info_t *info, uint32_t pstate, double
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else
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err++;
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break;
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case 0x14:
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case 0x14: /* Bobcat */
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/* BKDG 14h, page 430
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MSRC001_00[6B:64][8:4] is CpuDidMSD
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MSRC001_00[6B:64][3:0] is CpuDidLSD
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@ -688,25 +689,28 @@ static int get_amd_multipliers(struct msr_info_t *info, uint32_t pstate, double
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err += cpu_rdmsr_range(info->handle, pstate, 3, 0, &CpuDidLSD);
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*multiplier = (double) (((info->cpu_clock + 5) / 100 + magic_constant) / (CpuDid + CpuDidLSD * 0.25 + 1));
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break;
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case 0x10:
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case 0x10: /* K10 */
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/* BKDG 10h, page 429
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MSRC001_00[6B:64][8:6] is CpuDid
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MSRC001_00[6B:64][5:0] is CpuFid
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CPU COF is (100 MHz * (CpuFid + 10h) / (2^CpuDid))
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Note: This family contains only CPUs */
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case 0x11:
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/* Fall through */
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case 0x11: /* K8 & K10 "hybrid" */
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/* BKDG 11h, page 236
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MSRC001_00[6B:64][8:6] is CpuDid
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MSRC001_00[6B:64][5:0] is CpuFid
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CPU COF is ((100 MHz * (CpuFid + 08h)) / (2^CpuDid))
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Note: This family contains only CPUs */
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case 0x15:
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/* Fall through */
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case 0x15: /* Bulldozer / Piledriver / Steamroller / Excavator */
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/* BKDG 15h, page 570/580/635/692 (00h-0Fh/10h-1Fh/30h-3Fh/60h-6Fh)
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MSRC001_00[6B:64][8:6] is CpuDid
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MSRC001_00[6B:64][5:0] is CpuFid
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CoreCOF is (100 * (MSRC001_00[6B:64][CpuFid] + 10h) / (2^MSRC001_00[6B:64][CpuDid]))
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Note: This family contains BOTH CPUs and APUs */
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case 0x16:
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/* Fall through */
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case 0x16: /* Jaguar / Puma */
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/* BKDG 16h, page 549/611 (00h-0Fh/30h-3Fh)
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MSRC001_00[6B:64][8:6] is CpuDid
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MSRC001_00[6B:64][5:0] is CpuFid
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@ -716,16 +720,27 @@ static int get_amd_multipliers(struct msr_info_t *info, uint32_t pstate, double
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err += cpu_rdmsr_range(info->handle, pstate, 5, 0, &CpuFid);
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*multiplier = ((double) (CpuFid + magic_constant) / (1ull << CpuDid)) / divisor;
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break;
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case 0x17:
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case 0x17: /* Zen / Zen+ / Zen 2 */
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/* PPR 17h, pages 30 and 138-139
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MSRC001_00[6B:64][13:8] is CpuDfsId
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MSRC001_00[6B:64][7:0] is CpuFid
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CoreCOF is (Core::X86::Msr::PStateDef[CpuFid[7:0]] / Core::X86::Msr::PStateDef[CpuDfsId]) * 200 */
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/* Fall through */
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case 0x18: /* Hygon Dhyana */
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/* Note: Dhyana is "mostly a re-branded Zen CPU for the Chinese server market"
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https://www.phoronix.com/news/Hygon-Dhyana-AMD-China-CPUs */
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/* Fall through */
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case 0x19: /* Zen 3 / Zen 3+ / Zen 4 */
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/* PPR for AMD Family 19h Model 70h A0, pages 37 and 206-207
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MSRC001_006[4...B][13:8] is CpuDfsId
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MSRC001_006[4...B][7:0] is CpuFid
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CoreCOF is (Core::X86::Msr::PStateDef[CpuFid[7:0]]/Core::X86::Msr::PStateDef[CpuDfsId]) *200 */
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err = cpu_rdmsr_range(info->handle, pstate, 13, 8, &CpuDid);
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err += cpu_rdmsr_range(info->handle, pstate, 7, 0, &CpuFid);
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*multiplier = ((double) CpuFid / CpuDid) * 2;
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break;
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default:
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warnf("get_amd_multipliers(): unsupported CPU extended family: %xh\n", info->id->ext_family);
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err = 1;
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break;
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}
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