diff --git a/libcpuid/libcpuid_internal.h b/libcpuid/libcpuid_internal.h
index 0175909..883c6c4 100644
--- a/libcpuid/libcpuid_internal.h
+++ b/libcpuid/libcpuid_internal.h
@@ -119,6 +119,10 @@ enum _common_bits_t {
 	_5                      = LBIT(  4 ),
 	_7                      = LBIT(  5 ),
 	_9                      = LBIT(  6 ),
+	_H                      = LBIT(  7 ),
+	_S                      = LBIT(  8 ),
+	_U                      = LBIT(  9 ),
+	_X                      = LBIT( 10 ),
 };
 
 // additional detection bits for Intel CPUs:
@@ -129,19 +133,16 @@ enum _intel_bits_t {
 	_I_                     = LBIT( 13 ),
 	XEON_                   = LBIT( 14 ),
 	ATOM_                   = LBIT( 15 ),
-	_H                      = LBIT( 16 ),
-	_K                      = LBIT( 17 ),
-	_X                      = LBIT( 18 ),
-	_P                      = LBIT( 19 ),
-	_N                      = LBIT( 20 ),
-	_W_                     = LBIT( 21 ),
-	_D_                     = LBIT( 22 ),
-	_BRONZE_                = LBIT( 23 ),
-	_SILVER_                = LBIT( 24 ),
-	_GOLD_                  = LBIT( 25 ),
-	_PLATINIUM_             = LBIT( 26 ),
-	_MAX_                   = LBIT( 27 ),
-	_U                      = LBIT( 28 ),
+	_K                      = LBIT( 16 ),
+	_P                      = LBIT( 17 ),
+	_N                      = LBIT( 18 ),
+	_W_                     = LBIT( 19 ),
+	_D_                     = LBIT( 20 ),
+	_BRONZE_                = LBIT( 21 ),
+	_SILVER_                = LBIT( 22 ),
+	_GOLD_                  = LBIT( 23 ),
+	_PLATINIUM_             = LBIT( 24 ),
+	_MAX_                   = LBIT( 25 ),
 };
 typedef enum _intel_bits_t intel_bits_t;
 
diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c
index acb5b80..5d8e871 100644
--- a/libcpuid/recog_amd.c
+++ b/libcpuid/recog_amd.c
@@ -353,14 +353,15 @@ const struct match_entry_t cpudb_amd[] = {
 	{ 15, -1,  2, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_7           ,     0, "Ryzen 7 (Raphael)"             },
 	{ 15, -1,  2, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_5           ,     0, "Ryzen 5 (Raphael)"             },
 	{ 15, -1,  2, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_3           ,     0, "Ryzen 3 (Raphael)"             },
-	//{ 15, -1, -1, 25,   ??,  -1,    -1,    -1, NC, RYZEN_|_9           ,     0, "Ryzen 9 (Dragon Range)"        },
-	//{ 15, -1, -1, 25,   ??,  -1,    -1,    -1, NC, RYZEN_|_7           ,     0, "Ryzen 7 (Dragon Range)"        },
-	//{ 15, -1, -1, 25,   ??,  -1,    -1,    -1, NC, RYZEN_|_5           ,     0, "Ryzen 5 (Dragon Range)"        },
-	//{ 15, -1, -1, 25,   ??,  -1,    -1,    -1, NC, RYZEN_|_3           ,     0, "Ryzen 3 (Dragon Range)"        },
-	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_9           ,     0, "Ryzen 9 (Phoenix)"             },
-	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_7           ,     0, "Ryzen 7 (Phoenix)"             },
-	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_5           ,     0, "Ryzen 5 (Phoenix)"             },
-	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_3           ,     0, "Ryzen 3 (Phoenix)"             },
+	{ 15, -1, -1, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_9|_H        ,     0, "Ryzen 9 (Dragon Range)"        },
+	{ 15, -1, -1, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_7|_H        ,     0, "Ryzen 7 (Dragon Range)"        },
+	{ 15, -1, -1, 25,   97,  -1,    -1,    -1, NC, RYZEN_|_5|_H        ,     0, "Ryzen 5 (Dragon Range)"        },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_9|_H        ,     0, "Ryzen 9 (Phoenix)"             },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_7|_H        ,     0, "Ryzen 7 (Phoenix)"             },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_7|_U        ,     0, "Ryzen 7 (Phoenix)"             },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_5|_H        ,     0, "Ryzen 5 (Phoenix)"             },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_5|_U        ,     0, "Ryzen 5 (Phoenix)"             },
+	{ 15, -1, -1, 25,  116,  -1,    -1,    -1, NC, RYZEN_|_3|_U        ,     0, "Ryzen 3 (Phoenix)"             },
 	/* F   M   S  EF    EM  #cores  L2$   L3$  BC  ModelBits          ModelCode  Name                           */
 };
 
@@ -520,6 +521,7 @@ static struct amd_code_and_bits_t decode_amd_codename_part1(const char *bs)
 	struct amd_code_and_bits_t result;
 	uint64_t bits = 0;
 	int i = 0;
+	const size_t n = strlen(bs);
 
 	const struct { amd_code_t c; const char *search; } code_matchtable[] = {
 		{ PHENOM2, "Phenom(tm) II" },
@@ -574,6 +576,14 @@ static struct amd_code_and_bits_t decode_amd_codename_part1(const char *bs)
 			case '7': bits |= _7; break;
 			case '9': bits |= _9; break;
 		}
+		for(i = i + 7; i < n; i++) {
+			switch (bs[i]) {
+				case 'H': bits |= _H; break;
+				case 'S': bits |= _S; break;
+				case 'U': bits |= _U; break;
+				case 'X': bits |= _X; break;
+			}
+		}
 	}
 
 	if ((i = match_pattern(bs, "C86 [357]")) != 0) {
diff --git a/libcpuid/recog_intel.c b/libcpuid/recog_intel.c
index c17c39e..f0ccef0 100644
--- a/libcpuid/recog_intel.c
+++ b/libcpuid/recog_intel.c
@@ -771,10 +771,11 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
 			switch (bs[i]) {
 				case 'H': bits |= _H; break;
 				case 'K': bits |= _K; break;
-				case 'X': bits |= _X; break;
-				case 'P': bits |= _P; break;
 				case 'N': bits |= _N; break;
+				case 'P': bits |= _P; break;
+				case 'S': bits |= _S; break;
 				case 'U': bits |= _U; break;
+				case 'X': bits |= _X; break;
 			}
 		}
 	}