mirror of
https://github.com/anrieff/libcpuid
synced 2025-06-07 00:51:40 +00:00
Add cache instances field in cpu_id_t and system_id_t
This commit is contained in:
Xorg
parent
0c9ef3249c
commit
6b742be8cb
141 changed files with 967 additions and 32 deletions
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@ -87,6 +87,11 @@ typedef enum {
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NEED_L2_CACHELINE,
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NEED_L3_CACHELINE,
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NEED_L4_CACHELINE,
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NEED_L1D_INSTANCES,
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NEED_L1I_INSTANCES,
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NEED_L2_INSTANCES,
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NEED_L3_INSTANCES,
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NEED_L4_INSTANCES,
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NEED_CODENAME,
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NEED_FEATURES,
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NEED_CLOCK,
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@ -151,6 +156,11 @@ matchtable[] = {
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{ NEED_L2_CACHELINE , "--l2-cacheline" , 1},
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{ NEED_L3_CACHELINE , "--l3-cacheline" , 1},
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{ NEED_L4_CACHELINE , "--l4-cacheline" , 1},
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{ NEED_L1D_INSTANCES, "--l1d-instances", 1},
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{ NEED_L1I_INSTANCES, "--l1i-instances", 1},
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{ NEED_L2_INSTANCES , "--l2-instances" , 1},
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{ NEED_L3_INSTANCES , "--l3-instances" , 1},
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{ NEED_L4_INSTANCES , "--l4-instances" , 1},
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{ NEED_CODENAME , "--codename" , 1},
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{ NEED_FEATURES , "--flags" , 1},
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{ NEED_CLOCK , "--clock" , 0},
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@ -445,6 +455,21 @@ static void print_info(output_data_switch query, struct cpu_id_t* data)
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case NEED_L4_CACHELINE:
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fprintf(fout, "%d\n", data->l4_cacheline);
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break;
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case NEED_L1D_INSTANCES:
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fprintf(fout, "%d\n", data->l1_data_instances);
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break;
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case NEED_L1I_INSTANCES:
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fprintf(fout, "%d\n", data->l1_instruction_instances);
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break;
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case NEED_L2_INSTANCES:
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fprintf(fout, "%d\n", data->l2_instances);
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break;
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case NEED_L3_INSTANCES:
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fprintf(fout, "%d\n", data->l3_instances);
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break;
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case NEED_L4_INSTANCES:
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fprintf(fout, "%d\n", data->l4_instances);
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break;
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case NEED_CODENAME:
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fprintf(fout, "%s\n", data->cpu_codename);
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break;
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@ -733,6 +758,11 @@ int main(int argc, char** argv)
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fprintf(fout, " L2 line sz : %d bytes\n", data.cpu_types[cpu_type_index].l2_cacheline);
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fprintf(fout, " L3 line sz : %d bytes\n", data.cpu_types[cpu_type_index].l3_cacheline);
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fprintf(fout, " L4 line sz : %d bytes\n", data.cpu_types[cpu_type_index].l4_cacheline);
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fprintf(fout, " L1D inst. : %d\n", data.cpu_types[cpu_type_index].l1_data_instances);
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fprintf(fout, " L1I inst. : %d\n", data.cpu_types[cpu_type_index].l1_instruction_instances);
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fprintf(fout, " L2 inst. : %d\n", data.cpu_types[cpu_type_index].l2_instances);
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fprintf(fout, " L3 inst. : %d\n", data.cpu_types[cpu_type_index].l3_instances);
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fprintf(fout, " L4 inst. : %d\n", data.cpu_types[cpu_type_index].l4_instances);
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fprintf(fout, " SSE units : %d bits (%s)\n", data.cpu_types[cpu_type_index].sse_size, data.cpu_types[cpu_type_index].detection_hints[CPU_HINT_SSE_SIZE_AUTH] ? "authoritative" : "non-authoritative");
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fprintf(fout, " code name : `%s'\n", data.cpu_types[cpu_type_index].cpu_codename);
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fprintf(fout, " features :");
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@ -64,6 +64,7 @@ static void cpu_id_t_constructor(struct cpu_id_t* id)
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id->l1_data_cache = id->l1_instruction_cache = id->l2_cache = id->l3_cache = id->l4_cache = -1;
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id->l1_assoc = id->l1_data_assoc = id->l1_instruction_assoc = id->l2_assoc = id->l3_assoc = id->l4_assoc = -1;
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id->l1_cacheline = id->l1_data_cacheline = id->l1_instruction_cacheline = id->l2_cacheline = id->l3_cacheline = id->l4_cacheline = -1;
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id->l1_data_instances = id->l1_instruction_instances = id->l2_instances = id->l3_instances = id->l4_instances = -1;
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id->sse_size = -1;
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init_affinity_mask(&id->affinity_mask);
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id->purpose = PURPOSE_GENERAL;
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@ -78,8 +79,29 @@ static void cpu_raw_data_array_t_constructor(struct cpu_raw_data_array_t* raw_ar
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static void system_id_t_constructor(struct system_id_t* system)
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{
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system->num_cpu_types = 0;
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system->cpu_types = NULL;
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system->num_cpu_types = 0;
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system->cpu_types = NULL;
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system->l1_data_total_instances = -1;
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system->l1_instruction_total_instances = -1;
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system->l2_total_instances = -1;
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system->l3_total_instances = -1;
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system->l4_total_instances = -1;
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}
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static void apic_info_t_constructor(struct internal_apic_info_t* apic_info, logical_cpu_t logical_cpu)
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{
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memset(apic_info, 0, sizeof(struct internal_apic_info_t));
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apic_info->apic_id = -1;
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apic_info->package_id = -1;
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apic_info->core_id = -1;
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apic_info->smt_id = -1;
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apic_info->logical_cpu = logical_cpu;
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}
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static void cache_instances_t_constructor(struct internal_cache_instances_t* data)
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{
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memset(data->instances, 0, sizeof(data->instances));
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memset(data->htable, 0, sizeof(data->htable));
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}
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static void cpuid_grow_raw_data_array(struct cpu_raw_data_array_t* raw_array, logical_cpu_t n)
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@ -731,6 +753,72 @@ static void make_list_from_string(const char* csv, struct cpu_list_t* list)
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}
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}
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static bool cpu_ident_apic_id(logical_cpu_t logical_cpu, struct cpu_raw_data_t* raw, struct internal_apic_info_t* apic_info)
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{
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uint8_t subleaf;
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uint8_t level_type = 0;
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uint8_t mask_core_shift = 0;
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uint32_t mask_smt_shift, core_plus_mask_width, package_mask, core_mask, smt_mask;
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cpu_vendor_t vendor = VENDOR_UNKNOWN;
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char vendor_str[VENDOR_STR_MAX];
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apic_info_t_constructor(apic_info, logical_cpu);
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vendor = cpuid_vendor_identify(raw->basic_cpuid[0], vendor_str);
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if (vendor == VENDOR_UNKNOWN) {
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set_error(ERR_CPU_UNKN);
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return false;
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}
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/* Only AMD and Intel x86 CPUs support Extended Processor Topology Eumeration */
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switch (vendor) {
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case VENDOR_INTEL:
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case VENDOR_AMD:
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break;
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default:
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return false;
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}
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/* Documentation: Intel® 64 and IA-32 Architectures Software Developer’s Manual
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Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D and 4
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https://cdrdv2.intel.com/v1/dl/getContent/671200
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Examples 8-20 and 8-22 are implemented below.
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*/
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/* Check if leaf 0Bh is supported and if number of logical processors at this level type is greater than 0 */
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if ((raw->basic_cpuid[0][EAX] < 11) || (EXTRACTS_BITS(raw->basic_cpuid[11][EBX], 15, 0) == 0))
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return false;
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/* Derive core mask offsets */
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for (subleaf = 0; (raw->intel_fn11[subleaf][EAX] != 0x0) && (raw->intel_fn11[subleaf][EBX] != 0x0) && (subleaf < MAX_INTELFN11_LEVEL); subleaf++)
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mask_core_shift = EXTRACTS_BITS(raw->intel_fn11[subleaf][EAX], 4, 0);
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/* Find mask and ID for SMT and cores */
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for (subleaf = 0; (raw->intel_fn11[subleaf][EAX] != 0x0) && (raw->intel_fn11[subleaf][EBX] != 0x0) && (subleaf < MAX_INTELFN11_LEVEL); subleaf++) {
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level_type = EXTRACTS_BITS(raw->intel_fn11[subleaf][ECX], 15, 8);
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apic_info->apic_id = raw->intel_fn11[subleaf][EDX];
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switch (level_type) {
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case 0x01:
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mask_smt_shift = EXTRACTS_BITS(raw->intel_fn11[subleaf][EAX], 4, 0);
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smt_mask = ~( (-1) << mask_smt_shift);
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apic_info->smt_id = apic_info->apic_id & smt_mask;
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break;
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case 0x02:
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core_plus_mask_width = ~( (-1) << mask_core_shift);
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core_mask = core_plus_mask_width ^ smt_mask;
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apic_info->core_id = apic_info->apic_id & core_mask;
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break;
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default:
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break;
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}
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}
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/* Find mask and ID for packages */
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package_mask = (-1) << mask_core_shift;
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apic_info->package_id = apic_info->apic_id & package_mask;
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return (level_type > 0);
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}
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/* Interface: */
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@ -853,8 +941,7 @@ int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data, struct
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raw = &myraw;
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}
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cpu_id_t_constructor(data);
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internal->smt_id = -1;
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internal->core_id = -1;
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memset(internal->cache_mask, 0, sizeof(internal->cache_mask));
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if ((r = cpuid_basic_identify(raw, data)) < 0)
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return set_error(r);
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switch (data->vendor) {
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@ -908,20 +995,55 @@ int cpu_identify(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
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return r;
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}
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static void update_cache_instances(struct internal_cache_instances_t* caches,
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struct internal_apic_info_t* apic_info,
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struct internal_id_info_t* id_info)
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{
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uint32_t cache_id_index = 0;
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cache_type_t level;
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for (level = 0; level < NUM_CACHE_TYPES; level++) {
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if (id_info->cache_mask[level] == 0x00000000) {
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apic_info->cache_id[level] = -1;
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continue;
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}
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apic_info->cache_id[level] = apic_info->apic_id & id_info->cache_mask[level];
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cache_id_index = apic_info->cache_id[level] % CACHES_HTABLE_SIZE;
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if ((caches->htable[level][cache_id_index].cache_id == 0) || (caches->htable[level][cache_id_index].cache_id == apic_info->cache_id[level])) {
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if (caches->htable[level][cache_id_index].num_logical_cpu == 0)
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caches->instances[level]++;
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caches->htable[level][cache_id_index].cache_id = apic_info->cache_id[level];
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caches->htable[level][cache_id_index].num_logical_cpu++;
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}
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else {
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warnf("update_cache_instances: collision at index %u (cache ID is %i, not %i)\n",
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cache_id_index, caches->htable[level][cache_id_index].cache_id, apic_info->cache_id[level]);
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}
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}
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debugf(3, "Logical CPU %4u: APIC ID %4i, package ID %4i, core ID %4i, thread %i, L1I$ ID %4i, L1D$ ID %4i, L2$ ID %4i, L3$ ID %4i, L4$ ID %4i\n",
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apic_info->logical_cpu, apic_info->apic_id, apic_info->package_id, apic_info->core_id, apic_info->smt_id,
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apic_info->cache_id[L1I], apic_info->cache_id[L1D], apic_info->cache_id[L2], apic_info->cache_id[L3], apic_info->cache_id[L4]);
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}
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int cpu_identify_all(struct cpu_raw_data_array_t* raw_array, struct system_id_t* system)
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{
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int cur_error = set_error(ERR_OK);
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int ret_error = set_error(ERR_OK);
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double smt_divisor;
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bool is_new_cpu_type;
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bool is_last_item;
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bool is_smt_supported;
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bool is_apic_supported = true;
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uint8_t cpu_type_index = 0;
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int32_t num_logical_cpus = 1;
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int32_t num_logical_cpus = 0;
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logical_cpu_t logical_cpu = 0;
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cpu_purpose_t purpose;
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cpu_affinity_mask_t affinity_mask;
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struct cpu_raw_data_array_t my_raw_array;
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struct internal_id_info_t throwaway;
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struct internal_id_info_t id_info;
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struct internal_apic_info_t apic_info;
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struct internal_cache_instances_t caches_type, caches_all;
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if (system == NULL)
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return set_error(ERR_HANDLE);
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@ -931,47 +1053,81 @@ int cpu_identify_all(struct cpu_raw_data_array_t* raw_array, struct system_id_t*
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raw_array = &my_raw_array;
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}
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system_id_t_constructor(system);
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if (raw_array->with_affinity) {
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cache_instances_t_constructor(&caches_type);
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cache_instances_t_constructor(&caches_all);
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if (raw_array->with_affinity)
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init_affinity_mask(&affinity_mask);
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set_affinity_mask_bit(0, &affinity_mask);
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}
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/* Iterate over all RAW */
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for (logical_cpu = 0; logical_cpu < raw_array->num_raw; logical_cpu++) {
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is_new_cpu_type = false;
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is_last_item = (logical_cpu + 1 >= raw_array->num_raw);
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debugf(2, "Identifying logical core %u\n", logical_cpu);
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/* Get CPU purpose and APIC ID
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For hybrid CPUs, the purpose may be different than the previous iteration (e.g. from P-cores to E-cores)
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APIC ID are unique for each logical CPU cores.
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*/
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purpose = cpu_ident_purpose(&raw_array->raw[logical_cpu]);
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if (raw_array->with_affinity && is_apic_supported)
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is_apic_supported = cpu_ident_apic_id(logical_cpu, &raw_array->raw[logical_cpu], &apic_info);
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/* Put data to system->cpu_types on the first iteration or when purpose is different than previous core */
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if ((system->num_cpu_types == 0) || (purpose != system->cpu_types[system->num_cpu_types - 1].purpose)) {
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is_new_cpu_type = true;
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cpu_type_index = system->num_cpu_types;
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cpu_type_index = system->num_cpu_types;
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cpuid_grow_system_id(system, system->num_cpu_types + 1);
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cur_error = cpu_ident_internal(&raw_array->raw[logical_cpu], &system->cpu_types[cpu_type_index], &throwaway);
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cur_error = cpu_ident_internal(&raw_array->raw[logical_cpu], &system->cpu_types[cpu_type_index], &id_info);
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if (ret_error == ERR_OK)
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ret_error = cur_error;
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}
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/* Increment logical and physical CPU counters for current purpose */
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else if (raw_array->with_affinity) {
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/* Increment counters only for current purpose */
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if (raw_array->with_affinity && ((logical_cpu == 0) || !is_new_cpu_type)) {
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set_affinity_mask_bit(logical_cpu, &affinity_mask);
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num_logical_cpus++;
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if (is_apic_supported) {
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update_cache_instances(&caches_type, &apic_info, &id_info);
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update_cache_instances(&caches_all, &apic_info, &id_info);
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}
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}
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/* Update logical and physical CPU counters in system->cpu_types on the last iteration or when purpose is different than previous core */
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if (raw_array->with_affinity && ((logical_cpu + 1 == raw_array->num_raw) || (is_new_cpu_type && (system->num_cpu_types > 1)))) {
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cpu_type_index = is_new_cpu_type && raw_array->with_affinity ? system->num_cpu_types - 2 : system->num_cpu_types - 1;
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if (raw_array->with_affinity && (is_last_item || (is_new_cpu_type && (system->num_cpu_types > 1)))) {
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cpu_type_index = is_new_cpu_type ? system->num_cpu_types - 2 : system->num_cpu_types - 1;
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is_smt_supported = (system->cpu_types[cpu_type_index].num_logical_cpus % system->cpu_types[cpu_type_index].num_cores) == 0;
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smt_divisor = is_smt_supported ? system->cpu_types[cpu_type_index].num_logical_cpus / system->cpu_types[cpu_type_index].num_cores : 1.0;
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/* Save current values in system->cpu_types[cpu_type_index] */
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copy_affinity_mask(&system->cpu_types[cpu_type_index].affinity_mask, &affinity_mask);
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system->cpu_types[cpu_type_index].num_cores = num_logical_cpus / smt_divisor;
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smt_divisor = is_smt_supported ? system->cpu_types[cpu_type_index].num_logical_cpus / system->cpu_types[cpu_type_index].num_cores : 1.0;
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/* Save current values in system->cpu_types[cpu_type_index] and reset values for the next purpose */
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system->cpu_types[cpu_type_index].num_cores = num_logical_cpus / smt_divisor;
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system->cpu_types[cpu_type_index].num_logical_cpus = num_logical_cpus;
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/* Reset values for the next purpose */
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init_affinity_mask(&affinity_mask);
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set_affinity_mask_bit(logical_cpu, &affinity_mask);
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num_logical_cpus = 1;
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num_logical_cpus = 1;
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copy_affinity_mask(&system->cpu_types[cpu_type_index].affinity_mask, &affinity_mask);
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if (!is_last_item) {
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init_affinity_mask(&affinity_mask);
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set_affinity_mask_bit(logical_cpu, &affinity_mask);
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}
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if (is_apic_supported) {
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system->cpu_types[cpu_type_index].l1_instruction_instances = caches_type.instances[L1I];
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system->cpu_types[cpu_type_index].l1_data_instances = caches_type.instances[L1D];
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system->cpu_types[cpu_type_index].l2_instances = caches_type.instances[L2];
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system->cpu_types[cpu_type_index].l3_instances = caches_type.instances[L3];
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system->cpu_types[cpu_type_index].l4_instances = caches_type.instances[L4];
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if (!is_last_item) {
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cache_instances_t_constructor(&caches_type);
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update_cache_instances(&caches_type, &apic_info, &id_info);
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update_cache_instances(&caches_all, &apic_info, &id_info);
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}
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}
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}
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}
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/* Update the grand total of cache instances */
|
||||
if (is_apic_supported) {
|
||||
system->l1_instruction_total_instances = caches_all.instances[L1I];
|
||||
system->l1_data_total_instances = caches_all.instances[L1D];
|
||||
system->l2_total_instances = caches_all.instances[L2];
|
||||
system->l3_total_instances = caches_all.instances[L3];
|
||||
system->l4_total_instances = caches_all.instances[L4];
|
||||
}
|
||||
|
||||
/* Update the total_logical_cpus value for each purpose */
|
||||
for (cpu_type_index = 0; cpu_type_index < system->num_cpu_types; cpu_type_index++)
|
||||
system->cpu_types[cpu_type_index].total_logical_cpus = logical_cpu;
|
||||
|
|
|
|||
|
|
@ -428,6 +428,21 @@ struct cpu_id_t {
|
|||
/** Cache-line size for L4 cache. -1 if undetermined */
|
||||
int32_t l4_cacheline;
|
||||
|
||||
/** Number of L1 data cache instances. -1 if undetermined */
|
||||
int32_t l1_data_instances;
|
||||
|
||||
/** Number of L1 intruction cache instances. -1 if undetermined */
|
||||
int32_t l1_instruction_instances;
|
||||
|
||||
/** Number of L2 cache instances. -1 if undetermined */
|
||||
int32_t l2_instances;
|
||||
|
||||
/** Number of L3 cache instances. -1 if undetermined */
|
||||
int32_t l3_instances;
|
||||
|
||||
/** Number of L4 cache instances. -1 if undetermined */
|
||||
int32_t l4_instances;
|
||||
|
||||
/**
|
||||
* The brief and human-friendly CPU codename, which was recognized.<br>
|
||||
* Examples:
|
||||
|
|
@ -473,6 +488,21 @@ struct system_id_t {
|
|||
|
||||
/** array of recognized CPU features/info for each different processor types in the system */
|
||||
struct cpu_id_t* cpu_types;
|
||||
|
||||
/** Number of total L1 data cache instances. -1 if undetermined */
|
||||
int32_t l1_data_total_instances;
|
||||
|
||||
/** Number of total L1 intruction cache instances. -1 if undetermined */
|
||||
int32_t l1_instruction_total_instances;
|
||||
|
||||
/** Number of total L2 cache instances. -1 if undetermined */
|
||||
int32_t l2_total_instances;
|
||||
|
||||
/** Number of total L3 cache instances. -1 if undetermined */
|
||||
int32_t l3_total_instances;
|
||||
|
||||
/** Number of total L4 cache instances. -1 if undetermined */
|
||||
int32_t l4_total_instances;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -72,6 +72,26 @@ struct internal_id_info_t {
|
|||
int32_t cache_mask[NUM_CACHE_TYPES];
|
||||
};
|
||||
|
||||
struct internal_apic_info_t {
|
||||
int32_t apic_id;
|
||||
int32_t package_id;
|
||||
int32_t core_id;
|
||||
int32_t smt_id;
|
||||
int32_t cache_id[NUM_CACHE_TYPES];
|
||||
logical_cpu_t logical_cpu;
|
||||
};
|
||||
|
||||
struct internal_cache_id_t {
|
||||
logical_cpu_t num_logical_cpu;
|
||||
int32_t cache_id;
|
||||
};
|
||||
|
||||
#define CACHES_HTABLE_SIZE 256
|
||||
struct internal_cache_instances_t {
|
||||
uint8_t instances[NUM_CACHE_TYPES];
|
||||
struct internal_cache_id_t htable[NUM_CACHE_TYPES][CACHES_HTABLE_SIZE];
|
||||
};
|
||||
|
||||
#define LBIT(x) (((long long) 1) << x)
|
||||
|
||||
enum _common_bits_t {
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (authoritative)
|
||||
Brazos Zacate (Dual-core)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor ssse3 cx16 syscall popcnt mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Bulldozer X4
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma4 cpb
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Godavari X4
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 tbm f16c cpb aperfmperf bmi1
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Kaveri X4
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 tbm f16c cpb aperfmperf bmi1
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Vishera X4
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 tbm f16c cpb aperfmperf bmi1
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (authoritative)
|
||||
Athlon II (Champlain)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Athlon X2 (Kuma)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Athlon II X4 (Propus)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Athlon II X4 (Propus)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Athlon II X4 (Propus)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Athlon II X2 (Regor)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Magny-Cours Opteron
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Phenom II X4 (Deneb)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Phenom II X3 (Heka)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Phenom II X6 (Thuban)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc cpb
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Phenom X4 (Agena/512K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Sempron (Sargas)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Athlon XP (Thoroughbred)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 mmx fxsr sse syscall mmxext 3dnow 3dnowext ts
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Duron (Applebred)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 mmx fxsr sse syscall mmxext 3dnow 3dnowext ts
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Sempron (Barton)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 mmx fxsr sse syscall mmxext 3dnow 3dnowext ts fid vid
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Athlon 64 X2 (Brisbane/512K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni cx16 syscall mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm 3dnowprefetch ts fid vid ttp tm_amd stc 100mhzsteps
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Athlon 64 (Venice/512K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 pni syscall mmxext 3dnow 3dnowext nx fxsr_opt lm lahf_lm ts fid vid ttp tm_amd stc
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Mobile Sempron 64 (Keene/512K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 pni cx16 syscall mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm ts fid vid ttp tm_amd stc
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Mobile Sempron 64 (Sonora/128K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall mmxext 3dnow 3dnowext nx fxsr_opt lahf_lm ts fid vid ttp
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Opteron (Dual Core)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni syscall mmxext 3dnow 3dnowext nx fxsr_opt lm lahf_lm cmp_legacy ts fid vid ttp
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Sempron 64 (Sparta/256K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 pni cx16 syscall mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm 3dnowprefetch ts fid vid ttp tm_amd stc 100mhzsteps
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Turion 64 (Lancaster/1024K)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 pni syscall mmxext 3dnow 3dnowext nx fxsr_opt lm lahf_lm ts fid vid ttp tm_amd stc
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 5 (Picasso)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 7 (Pinnacle Ridge)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Threadripper (Colfax)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
EPYC (Naples)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -99,6 +99,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 3 (Raven Ridge)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 5 (Raven Ridge)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 5 (Summit Ridge)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Ryzen 7 (Summit Ridge)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
Threadripper (Whitehaven)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
EPYC (Rome)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 5 (Lucienne)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -995,6 +995,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
6
|
||||
6
|
||||
6
|
||||
2
|
||||
0
|
||||
256 (authoritative)
|
||||
Ryzen 5 (Matisse)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 5 (Renoir)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 7 (Lucienne)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 7 (Matisse)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 7 (Renoir)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 9 (Matisse)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Threadripper (Castle Peak)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
EPYC (Milan)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 7 (Cezanne)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 7 (Rembrandt)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 9 (Cezanne)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 9 (Rembrandt)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
256 (authoritative)
|
||||
Ryzen 9 (Vermeer)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand cpb aperfmperf avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -35,10 +35,12 @@ def readResultFile():
|
|||
if s.find(":") == -1:
|
||||
continue
|
||||
numeric = ["family", "model", "stepping", "ext_family", "ext_model",
|
||||
"num_cores", "num_logical", "L1 D cache", "L1 I cache",
|
||||
"L2 cache", "L3 cache", "L4 cache", "L1D assoc.", "L1I assoc.",
|
||||
"L2 assoc.", "L3 assoc.", "L4 assoc.", "L1D line sz", "L1I line sz",
|
||||
"L2 line sz", "L3 line sz", "L4 line sz"]
|
||||
"num_cores", "num_logical",
|
||||
"L1 D cache", "L1 I cache", "L2 cache", "L3 cache", "L4 cache",
|
||||
"L1D assoc.", "L1I assoc.", "L2 assoc.", "L3 assoc.", "L4 assoc.",
|
||||
"L1D line sz", "L1I line sz", "L2 line sz", "L3 line sz", "L4 line sz",
|
||||
"L1D inst.", "L1I inst.", "L2 inst.", "L3 inst.", "L4 inst.",
|
||||
]
|
||||
field = s[:s.find(":")].strip()
|
||||
if field in numeric:
|
||||
value = s[s.find(":")+1:].strip()
|
||||
|
|
|
|||
|
|
@ -99,6 +99,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (authoritative)
|
||||
C86 7 (Dhyana)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor ssse3 cx16 sse4_1 sse4_2 syscall movbe popcnt xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw skinit wdt ts ttp tm_amd hwpstate constant_tsc fma3 f16c rdrand aperfmperf avx2 bmi1 bmi2 rdseed adx
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Cedarview)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm syscall xd movbe lm lahf_lm constant_tsc
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Diamondville)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm xd movbe lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Diamondville)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 xtpr pdcm xd movbe lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Pineview)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm xd movbe lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -99,6 +99,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Pineview)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm syscall xd movbe lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Atom (Pineview)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm syscall xd movbe lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Gemini Lake (Celeron)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd movbe popcnt aes xsave osxsave rdtscp lm lahf_lm constant_tsc rdrand x2apic sha_ni sgx rdseed
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Allendale (Core 2 Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Celeron Wolfdale 1M
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm xd xsave osxsave lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Conroe (Core 2 Duo) 1024K
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Conroe-L (Celeron)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss tm pbe pni dts64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Conroe-L (Allendale)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Conroe (Core 2 Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Kentsfield (Core 2 Quad)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Merom (Core 2 Duo) 2048K
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Merom (Core 2 Duo) 4096K
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Penryn (Core 2 Duo) 3M
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Penryn (Core 2 Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm syscall xd xsave osxsave lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Wolfdale (Core 2 Duo) 2M
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Xeon (Clovertown)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx tm2 ssse3 cx16 xtpr pdcm dca xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Xeon (Harpertown)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Xeon (Wolfdale)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Yonah (Core Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor vmx est tm2 xtpr pdcm xd
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Yonah (Core Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor vmx est tm2 xtpr pdcm xd
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
64 (non-authoritative)
|
||||
Yonah (Core Duo)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni monitor vmx est tm2 xtpr pdcm xd
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Yorkfield (Core 2 Quad) 2M
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xd xsave osxsave lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -91,6 +91,11 @@ general
|
|||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Yorkfield (Core 2 Quad) 6M
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xd lm lahf_lm
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Comet Lake-U (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sgx rdseed adx
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Cannon Lake (Core i3)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl rdseed adx avx512vbmi
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Ice Lake (Core i5)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl sgx rdseed adx avx512vnni avx512vbmi avx512vbmi2
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Ice Lake (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl sgx rdseed adx avx512vnni avx512vbmi avx512vbmi2
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Rocket Lake (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl rdseed adx avx512vnni avx512vbmi avx512vbmi2
|
||||
|
|
|
|||
|
|
@ -103,6 +103,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Tiger Lake (Core i5)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl rdseed adx avx512vnni avx512vbmi avx512vbmi2
|
||||
|
|
|
|||
|
|
@ -819,6 +819,11 @@ performance
|
|||
64
|
||||
64
|
||||
-1
|
||||
2
|
||||
2
|
||||
2
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i3)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
@ -847,6 +852,11 @@ efficiency
|
|||
64
|
||||
64
|
||||
-1
|
||||
8
|
||||
8
|
||||
2
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i3)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -1371,6 +1371,11 @@ performance
|
|||
64
|
||||
64
|
||||
-1
|
||||
6
|
||||
6
|
||||
6
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
@ -1399,6 +1404,11 @@ efficiency
|
|||
64
|
||||
64
|
||||
-1
|
||||
8
|
||||
8
|
||||
2
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -1371,6 +1371,11 @@ performance
|
|||
64
|
||||
64
|
||||
-1
|
||||
6
|
||||
6
|
||||
6
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i9)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
@ -1399,6 +1404,11 @@ efficiency
|
|||
64
|
||||
64
|
||||
-1
|
||||
8
|
||||
8
|
||||
2
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-P (Core i9)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -887,6 +887,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
6
|
||||
6
|
||||
6
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-S (Core i5)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 avx512f avx512dq avx512cd sha_ni avx512bw avx512vl rdseed adx avx512vnni avx512vbmi avx512vbmi2
|
||||
|
|
|
|||
|
|
@ -1647,6 +1647,11 @@ performance
|
|||
64
|
||||
64
|
||||
-1
|
||||
8
|
||||
8
|
||||
8
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-S (Core i9)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
@ -1675,6 +1680,11 @@ efficiency
|
|||
64
|
||||
64
|
||||
-1
|
||||
8
|
||||
8
|
||||
2
|
||||
1
|
||||
0
|
||||
128 (non-authoritative)
|
||||
Alder Lake-S (Core i9)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd movbe popcnt aes xsave osxsave avx rdtscp lm lahf_lm abm constant_tsc fma3 f16c rdrand x2apic avx2 bmi1 bmi2 sha_ni rdseed adx
|
||||
|
|
|
|||
|
|
@ -99,6 +99,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Arrandale (Core i5)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd popcnt aes rdtscp lm lahf_lm constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Arrandale (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt aes rdtscp lm lahf_lm constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Arrandale
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xd popcnt rdtscp lm lahf_lm constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Bloomfield (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt rdtscp lm lahf_lm constant_tsc
|
||||
|
|
|
|||
|
|
@ -95,6 +95,11 @@ general
|
|||
64
|
||||
64
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
-1
|
||||
128 (non-authoritative)
|
||||
Gulftown (Core i7)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt aes rdtscp lm lahf_lm constant_tsc
|
||||
|
|
|
|||
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Add table
Reference in a new issue