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https://github.com/anrieff/libcpuid
synced 2024-11-10 22:59:13 +00:00
Move code from cpu_msrinfo() in subfunctions
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86cf1df62c
commit
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1 changed files with 108 additions and 87 deletions
195
libcpuid/rdmsr.c
195
libcpuid/rdmsr.c
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@ -485,18 +485,115 @@ static int perfmsr_measure(struct msr_driver_t* handle, int msr)
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return (int) ((y - x) / (b - a));
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}
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#ifndef MSRINFO_DEFINED
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static double get_info_cur_multiplier(struct msr_driver_t* handle)
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{
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int err, cur_clock;
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uint64_t r;
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static double bclk = 0.0;
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#define IA32_THERM_STATUS 0x19C
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#define IA32_TEMPERATURE_TARGET 0x1a2
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#define IA32_PACKAGE_THERM_STATUS 0x1b1
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#define MSR_PERF_STATUS 0x198
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#define MSR_TURBO_RATIO_LIMIT 429
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if(cpuid_get_vendor() == VENDOR_INTEL) {
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if(!bclk)
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bclk = (double) cpu_msrinfo(handle, INFO_BCLK) / 100;
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if(bclk > 0) {
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cur_clock = cpu_clock_by_ic(10, 4);
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if(cur_clock > 0)
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return cur_clock / bclk;
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}
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}
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err = cpu_rdmsr(handle, 0x2a, &r);
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if (err) return CPU_INVALID_VALUE;
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return (r>>22) & 0x1f;
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}
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static double get_info_max_multiplier(struct msr_driver_t* handle)
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{
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#define PLATFORM_INFO_MSR 206
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#define PLATFORM_INFO_MSR_low 8
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#define PLATFORM_INFO_MSR_high 15
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int err;
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uint64_t val, r;
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static int multiplier = 0;
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if(cpuid_get_vendor() == VENDOR_INTEL) {
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if(!multiplier) {
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cpu_rdmsr_range(handle, PLATFORM_INFO_MSR, PLATFORM_INFO_MSR_high, PLATFORM_INFO_MSR_low, &val);
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multiplier = (int) val;
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}
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if(multiplier > 0)
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return multiplier;
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}
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err = cpu_rdmsr(handle, 0x198, &r);
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if (err) return CPU_INVALID_VALUE;
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return (r >> 40) & 0x1f;
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}
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static int get_info_temperature(struct msr_driver_t* handle)
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{
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#define IA32_THERM_STATUS 0x19C
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#define IA32_TEMPERATURE_TARGET 0x1a2
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uint64_t digital_readout, thermal_status, PROCHOT_temp;
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if(cpuid_get_vendor() == VENDOR_INTEL) {
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// https://github.com/ajaiantilal/i7z/blob/5023138d7c35c4667c938b853e5ea89737334e92/helper_functions.c#L59
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cpu_rdmsr_range(handle, IA32_THERM_STATUS, 23, 16, &digital_readout);
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cpu_rdmsr_range(handle, IA32_THERM_STATUS, 32, 31, &thermal_status);
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cpu_rdmsr_range(handle, IA32_TEMPERATURE_TARGET, 23, 16, &PROCHOT_temp);
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// These bits are thermal status : 1 if supported, 0 else
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if(thermal_status)
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return(PROCHOT_temp - digital_readout); // Temperature is prochot - digital readout
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}
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return CPU_INVALID_VALUE;
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}
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static double get_info_voltage(struct msr_driver_t* handle)
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{
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#define MSR_PERF_STATUS 0x198
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#define MSR_PSTATE_S 0xC0010063
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#define MSR_PSTATE_0 0xC0010064
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uint64_t val;
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if(cpuid_get_vendor() == VENDOR_INTEL) {
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cpu_rdmsr_range(handle, MSR_PERF_STATUS, 47, 32, &val);
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double ret = (double) val / (1 << 13);
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return (ret > 0) ? ret : CPU_INVALID_VALUE;
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}
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else if(cpuid_get_vendor() == VENDOR_AMD) {
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/* http://support.amd.com/TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf
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MSRC001_0063[2:0] = CurPstate
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MSRC001_00[6B:64][15:9] = CpuVid */
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uint64_t CpuVid;
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cpu_rdmsr_range(handle, MSR_PSTATE_S, 2, 0, &val);
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if(val <= 7) { // Support 8 P-states
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cpu_rdmsr_range(handle, MSR_PSTATE_0 + val, 15, 9, &CpuVid);
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return 1.550 - 0.0125 * CpuVid; // 2.4.1.6.3 - Serial VID (SVI) Encodings
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}
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}
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return CPU_INVALID_VALUE;
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}
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static double get_info_bclk(struct msr_driver_t* handle)
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{
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static int max_clock = 0, multiplier = 0;
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if(!max_clock)
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max_clock = cpu_clock_measure(100, 1); // Return the non-Turbo clock
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if(!multiplier)
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multiplier = cpu_msrinfo(handle, INFO_MAX_MULTIPLIER) / 100;
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if(max_clock > 0 && multiplier > 0)
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return (double) max_clock / multiplier;
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return CPU_INVALID_VALUE;
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}
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#ifndef MSRINFO_DEFINED
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#define IA32_PACKAGE_THERM_STATUS 0x1b1
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#define MSR_TURBO_RATIO_LIMIT 429
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int cpu_rdmsr_range(struct msr_driver_t* handle, uint32_t msr_index, uint8_t highbit,
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uint8_t lowbit, uint64_t* result)
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@ -520,13 +617,6 @@ int cpu_rdmsr_range(struct msr_driver_t* handle, uint32_t msr_index, uint8_t hig
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int cpu_msrinfo(struct msr_driver_t* handle, cpu_msrinfo_request_t which)
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{
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uint64_t r;
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int err, cur_clock;
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static int max_clock = 0, multiplier = 0;
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static double bclk = 0.0;
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uint64_t val;
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int digital_readout, thermal_status, PROCHOT_temp;
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if (handle == NULL)
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return set_error(ERR_HANDLE);
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switch (which) {
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@ -535,86 +625,17 @@ int cpu_msrinfo(struct msr_driver_t* handle, cpu_msrinfo_request_t which)
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case INFO_APERF:
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return perfmsr_measure(handle, 0xe8);
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case INFO_CUR_MULTIPLIER:
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{
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if(cpuid_get_vendor() == VENDOR_INTEL)
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{
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if(!bclk)
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bclk = (double) cpu_msrinfo(handle, INFO_BCLK) / 100;
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if(bclk > 0)
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{
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cur_clock = cpu_clock_by_ic(10, 4);
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if(cur_clock > 0)
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return (int) (cur_clock / bclk * 100);
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}
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}
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err = cpu_rdmsr(handle, 0x2a, &r);
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if (err) return CPU_INVALID_VALUE;
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return (int) ((r>>22) & 0x1f) * 100;
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}
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return (int) get_info_cur_multiplier(handle) * 100;
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case INFO_MAX_MULTIPLIER:
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{
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if(cpuid_get_vendor() == VENDOR_INTEL)
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{
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if(!multiplier) {
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cpu_rdmsr_range(handle, PLATFORM_INFO_MSR, PLATFORM_INFO_MSR_high, PLATFORM_INFO_MSR_low, &val);
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multiplier = (int) val;
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}
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if(multiplier > 0)
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return multiplier * 100;
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}
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err = cpu_rdmsr(handle, 0x198, &r);
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if (err) return CPU_INVALID_VALUE;
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return (int) ((r >> 40) & 0x1f) * 100;
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}
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return (int) get_info_max_multiplier(handle) * 100;
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case INFO_TEMPERATURE:
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if(cpuid_get_vendor() == VENDOR_INTEL)
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{
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// https://github.com/ajaiantilal/i7z/blob/5023138d7c35c4667c938b853e5ea89737334e92/helper_functions.c#L59
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cpu_rdmsr_range(handle, IA32_THERM_STATUS, 23, 16, &digital_readout);
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cpu_rdmsr_range(handle, IA32_THERM_STATUS, 32, 31, &thermal_status);
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cpu_rdmsr_range(handle, IA32_TEMPERATURE_TARGET, 23, 16, &PROCHOT_temp);
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// These bits are thermal status : 1 if supported, 0 else
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if(thermal_status)
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return(PROCHOT_temp - digital_readout); // Temperature is prochot - digital readout
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}
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return CPU_INVALID_VALUE;
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return get_info_temperature(handle);
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case INFO_THROTTLING:
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return CPU_INVALID_VALUE;
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case INFO_VOLTAGE:
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{
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if(cpuid_get_vendor() == VENDOR_INTEL)
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{
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cpu_rdmsr_range(handle, MSR_PERF_STATUS, 47, 32, &val);
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double ret = (double) val / (1 << 13);
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return (ret > 0) ? (int) (ret * 100) : CPU_INVALID_VALUE;
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}
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else if(cpuid_get_vendor() == VENDOR_AMD)
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{
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/* http://support.amd.com/TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf
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MSRC001_0063[2:0] = CurPstate
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MSRC001_00[6B:64][15:9] = CpuVid */
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uint64_t CpuVid;
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cpu_rdmsr_range(handle, MSR_PSTATE_S, 2, 0, &val);
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if(val <= 7) { // Support 8 P-states
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cpu_rdmsr_range(handle, MSR_PSTATE_0 + val, 15, 9, &CpuVid);
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return (int) (1.550 - 0.0125 * CpuVid) * 100; // 2.4.1.6.3 - Serial VID (SVI) Encodings
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}
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}
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return CPU_INVALID_VALUE;
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}
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return (int) get_info_voltage(handle) * 100;
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case INFO_BCLK:
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{
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if(!max_clock)
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max_clock = cpu_clock_measure(100, 1); // Return the non-Turbo clock
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if(!multiplier)
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multiplier = cpu_msrinfo(handle, INFO_MAX_MULTIPLIER) / 100;
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if(max_clock > 0 && multiplier > 0)
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return (int) ((double) max_clock / multiplier * 100);
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return CPU_INVALID_VALUE;
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}
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return (int) get_info_bclk(handle) * 100;
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default:
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return CPU_INVALID_VALUE;
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}
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