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Fix register type for match_arm_features()

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D:\a\libcpuid\libcpuid\libcpuid\recog_arm.c(890,3): warning C4244: 'function': conversion from 'uint64_t' to 'uint32_t', possible loss of data [D:\a\libcpuid\libcpuid\libcpuid\libcpuid_vc10.vcxproj]

Indeed, it was an issue.
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The Tumultuous Unicorn Of Darkness 2024-06-30 20:04:35 +02:00
parent 10bac35920
commit 7b87858dc2
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4 changed files with 7 additions and 6 deletions
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5
libcpuid/recog_arm.c
View file

@ -28,6 +28,7 @@
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <inttypes.h>
#include "libcpuid.h"
#include "libcpuid_util.h"
#include "libcpuid_internal.h"
@ -414,7 +415,7 @@ static void set_feature_status(struct cpu_id_t* data, struct arm_arch_extension_
}
}
static void match_arm_features(const struct arm_feature_map_t* matchtable, const char* reg_name, const int reg_number, uint32_t reg_value, struct cpu_id_t* data, struct arm_arch_extension_t* ext_status)
static void match_arm_features(const struct arm_feature_map_t* matchtable, const char* reg_name, const int reg_number, uint64_t reg_value, struct cpu_id_t* data, struct arm_arch_extension_t* ext_status)
{
int i;
bool feature_is_present;
@ -422,7 +423,7 @@ static void match_arm_features(const struct arm_feature_map_t* matchtable, const
for (i = 0; matchtable[i].feature != -1; i++) {
feature_is_present = (EXTRACTS_BITS(reg_value, matchtable[i].highbit, matchtable[i].lowbit) == matchtable[i].value);
if (feature_is_present)
debugf(3, "Register %8s%i (0x%016X): match value %u for bits [%2u:%2u], ", reg_name, reg_number, reg_value, matchtable[i].value, matchtable[i].highbit, matchtable[i].lowbit);
debugf(3, "Register %8s%i (0x%016" PRIX64 "): match value %u for bits [%2u:%2u], ", reg_name, reg_number, reg_value, matchtable[i].value, matchtable[i].highbit, matchtable[i].lowbit);
set_feature_status(data, ext_status, feature_is_present, matchtable[i].feature, matchtable[i].ver_optional, matchtable[i].ver_mandatory);
}
}

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tests/arm/armv8a/cortex-a53.test
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@ -85,4 +85,4 @@ efficiency
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Apollo
advsimd crc32 doublelock fp sve bbm fhm sel2
advsimd crc32 doublelock fp bbm

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tests/arm/armv8a/cortex-a57-qemu.test
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@ -85,4 +85,4 @@ performance
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Atlas
advsimd crc32 doublelock fp pmull sha1 sha256 sm4 sve bbm dotprod fhm sel2
advsimd crc32 doublelock fp pmull sha1 sha256 bbm

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tests/arm/armv9a/neoverse-n2-qemu.test
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@ -76,7 +76,7 @@ arm_id_aa64smfr0=0000000000000000
arm_id_aa64zfr0=0000110100110021
--------------------------------------------------------------------------------
ARM
ARMv9.2-A
ARMv9.0-A
general
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@ -85,4 +85,4 @@ general
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Perseus
advsimd crc32 csv2_1p1 doublelock pmull sha1 lse rdm f32mm fp16 sha512 sm4 sve fcma fpaccombine jscvt pacqarma5 pauth bbm dit fhm lrcpc2 sel2 bti dpb2 flagm2 mte rng ssbs2 bf16 dgh xs sve2 sve_bitperm sve_pmull128 sve_sha3 rme sme
advsimd crc32 doublelock pmull sha1 lse rdm fp16 i8mm sha3 sha512 sm3 sm4 sve fcma fpaccombine jscvt pacqarma5 pauth bbm dit dotprod fhm lrcpc2 lse2 bti dpb2 frintts flagm2 mte rng sb ssbs2 bf16 dgh sve2 sve_bitperm sve_pmull128 sve_sha3 sve_sm4 sme