1
0
Fork 0
mirror of https://github.com/anrieff/libcpuid synced 2025-10-03 11:01:30 +00:00

DB: add AMD Raphael

This commit is contained in:
Xorg 2022-10-01 17:36:40 +02:00
commit 863bf79bc9
No known key found for this signature in database
GPG key ID: 1E55EE2EFF18BC1A
3 changed files with 2925 additions and 0 deletions

View file

@ -329,6 +329,21 @@ const struct match_entry_t cpudb_amd[] = {
{ 15, -1, -1, 25, 68, -1, -1, -1, NC, RYZEN_|_7 , 0, "Ryzen 7 (Rembrandt)" },
{ 15, -1, -1, 25, 68, -1, -1, -1, NC, RYZEN_|_5 , 0, "Ryzen 5 (Rembrandt)" },
{ 15, -1, -1, 25, 68, -1, -1, -1, NC, RYZEN_|_3 , 0, "Ryzen 3 (Rembrandt)" },
/* Zen 4 (2022) => https://en.wikichip.org/wiki/amd/microarchitectures/zen_4 */
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, EPYC_ , 0, "EPYC (Genoa)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_TR_ , 0, "Threadripper (Storm Peak)" },
{ 15, -1, 2, 25, 97, -1, -1, -1, NC, RYZEN_|_9 , 0, "Ryzen 9 (Raphael)" },
{ 15, -1, 2, 25, 97, -1, -1, -1, NC, RYZEN_|_7 , 0, "Ryzen 7 (Raphael)" },
{ 15, -1, 2, 25, 97, -1, -1, -1, NC, RYZEN_|_5 , 0, "Ryzen 5 (Raphael)" },
{ 15, -1, 2, 25, 97, -1, -1, -1, NC, RYZEN_|_3 , 0, "Ryzen 3 (Raphael)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_9 , 0, "Ryzen 9 (Dragon Range)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_7 , 0, "Ryzen 7 (Dragon Range)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_5 , 0, "Ryzen 5 (Dragon Range)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_3 , 0, "Ryzen 3 (Dragon Range)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_9 , 0, "Ryzen 9 (Phoenix Point)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_7 , 0, "Ryzen 7 (Phoenix Point)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_5 , 0, "Ryzen 5 (Phoenix Point)" },
//{ 15, -1, -1, 25, ??, -1, -1, -1, NC, RYZEN_|_3 , 0, "Ryzen 3 (Phoenix Point)" },
/* F M S EF EM #cores L2$ L3$ BC ModelBits ModelCode Name */
{ 15, -1, -1, 24, 0, -1, -1, -1, NC, C86_|_7 , 0, "C86 7 (Dhyana)" },