diff --git a/libcpuid/libcpuid_internal.h b/libcpuid/libcpuid_internal.h
index 7f3671d..038aa20 100644
--- a/libcpuid/libcpuid_internal.h
+++ b/libcpuid/libcpuid_internal.h
@@ -58,6 +58,48 @@ struct internal_id_info_t {
 	int score; // detection (matchtable) score
 };
 
+#define LBIT(x) (((long long) 1) << x)
+
+enum _common_bits_t {
+	_M_                     = LBIT(  0 ),
+	MOBILE_                 = LBIT(  1 ),
+	_MP_                    = LBIT(  2 ),
+};
+
+// additional detection bits for Intel CPUs:
+enum _intel_bits_t {
+	PENTIUM_                = LBIT( 10 ),
+	CELERON_                = LBIT( 11 ),
+	CORE_                   = LBIT( 12 ),
+	_I_                     = LBIT( 13 ),
+	_3                      = LBIT( 14 ),
+	_5                      = LBIT( 15 ),
+	_7                      = LBIT( 16 ),
+	XEON_                   = LBIT( 17 ),
+	ATOM_                   = LBIT( 18 ),
+};
+typedef enum _intel_bits_t intel_bits_t;
+
+enum _amd_bits_t {
+	ATHLON_      = LBIT( 10 ),
+	_XP_         = LBIT( 11 ),
+	DURON_       = LBIT( 12 ),
+	SEMPRON_     = LBIT( 13 ),
+	OPTERON_     = LBIT( 14 ),
+	TURION_      = LBIT( 15 ),
+	_LV_         = LBIT( 16 ),
+	_64_         = LBIT( 17 ),
+	_X2          = LBIT( 18 ),
+	_X3          = LBIT( 19 ),
+	_X4          = LBIT( 20 ),
+	_X6          = LBIT( 21 ),
+	_FX          = LBIT( 22 ),
+	_APU_        = LBIT( 23 ),
+};
+typedef enum _amd_bits_t amd_bits_t;
+
+
+
 int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data, 
 		       struct internal_id_info_t* internal);
 
diff --git a/libcpuid/libcpuid_util.h b/libcpuid/libcpuid_util.h
index aba63f1..c3b5393 100644
--- a/libcpuid/libcpuid_util.h
+++ b/libcpuid/libcpuid_util.h
@@ -28,8 +28,6 @@
 
 #define COUNT_OF(array) (sizeof(array) / sizeof(array[0]))
 
-#define LBIT(x) (((long long) 1) << x)
-
 struct feature_map_t {
 	unsigned bit;
 	cpu_feature_t feature;
diff --git a/libcpuid/recog_amd.c b/libcpuid/recog_amd.c
index 1562bca..3867aa8 100644
--- a/libcpuid/recog_amd.c
+++ b/libcpuid/recog_amd.c
@@ -44,27 +44,6 @@ struct amd_code_and_bits_t {
 	uint64_t bits;
 };
 
-enum _amd_bits_t {
-	ATHLON_      = LBIT(  0 ),
-	_XP_         = LBIT(  1 ),
-	_M_          = LBIT(  2 ),
-	_MP_         = LBIT(  3 ),
-	MOBILE_      = LBIT(  4 ),
-	DURON_       = LBIT(  5 ),
-	SEMPRON_     = LBIT(  6 ),
-	OPTERON_     = LBIT(  7 ),
-	TURION_      = LBIT(  8 ),
-	_LV_         = LBIT(  9 ),
-	_64_         = LBIT( 10 ),
-	_X2          = LBIT( 11 ),
-	_X3          = LBIT( 12 ),
-	_X4          = LBIT( 13 ),
-	_X6          = LBIT( 14 ),
-	_FX          = LBIT( 15 ),
-	_APU_        = LBIT( 16 ),
-};
-typedef enum _amd_bits_t amd_bits_t;
-
 enum _amd_model_codes_t {
 	// Only for Ryzen CPUs:
 	_1400,
diff --git a/libcpuid/recog_intel.c b/libcpuid/recog_intel.c
index 1d6c6a8..5e6c03b 100644
--- a/libcpuid/recog_intel.c
+++ b/libcpuid/recog_intel.c
@@ -59,23 +59,6 @@ enum _intel_model_t {
 };
 typedef enum _intel_model_t intel_model_t;
 
-enum _intel_bits_t {
-	PENTIUM_                = LBIT(  0 ),
-	CELERON_                = LBIT(  1 ),
-	MOBILE_                 = LBIT(  2 ),
-	CORE_                   = LBIT(  3 ),
-	_I_                     = LBIT(  4 ),
-	_M_                     = LBIT(  5 ),
-	_3                      = LBIT(  6 ),
-	_5                      = LBIT(  7 ),
-	_7                      = LBIT(  8 ),
-	XEON_                   = LBIT(  9 ),
-	_MP                     = LBIT( 10 ),
-	ATOM_                   = LBIT( 11 ),
-	
-};
-typedef enum _intel_bits_t intel_bits_t;
-
 const struct match_entry_t cpudb_intel[] = {
 	{ -1, -1, -1, -1, -1,   1,    -1,    -1, NC, 0             ,     0, "Unknown Intel CPU"       },
 	
@@ -158,11 +141,11 @@ const struct match_entry_t cpudb_intel[] = {
 	{ 15,  0, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Foster)"           },
 	{ 15,  1, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Foster)"           },
 	{ 15,  2, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Prestonia)"        },
-	{ 15,  2, -1, 15, -1,   1,    -1,    -1, NC, XEON_|_MP     ,     0, "Xeon (Gallatin)"         },
+	{ 15,  2, -1, 15, -1,   1,    -1,    -1, NC, XEON_|_MP_    ,     0, "Xeon (Gallatin)"         },
 	{ 15,  3, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Nocona)"           },
 	{ 15,  4, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Nocona)"           },
 	{ 15,  4, -1, 15, -1,   1,    -1,    -1, IRWIN, XEON_      ,     0, "Xeon (Irwindale)"        },
-	{ 15,  4, -1, 15, -1,   1,    -1,    -1, NC, XEON_|_MP     ,     0, "Xeon (Cranford)"         },
+	{ 15,  4, -1, 15, -1,   1,    -1,    -1, NC, XEON_|_MP_    ,     0, "Xeon (Cranford)"         },
 	{ 15,  4, -1, 15, -1,   1,    -1,    -1, POTOMAC, XEON_    ,     0, "Xeon (Potomac)"          },
 	{ 15,  6, -1, 15, -1,   1,    -1,    -1, NC, XEON_         ,     0, "Xeon (Dempsey)"          },
 	
@@ -668,7 +651,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
 	
 	const struct { uint64_t bit; const char* search; } bit_matchtable[] = {
 		{ XEON_, "Xeon" },
-		{ _MP, " MP" },
+		{ _MP_, " MP" },
 		{ ATOM_, "Atom(TM) CPU" },
 		{ MOBILE_, "Mobile" },
 		{ CELERON_, "Celeron" },
@@ -710,7 +693,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
 			/* restrict by family, since later Xeons also have L3 ... */
 			code = IRWIN;
 	}
-	if (match_all(bits, XEON_ + _MP) && data->l3_cache > 0)
+	if (match_all(bits, XEON_ + _MP_) && data->l3_cache > 0)
 		code = POTOMAC;
 	if (code == CORE_SOLO) {
 		s = strstr(bs, "CPU");