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DB: Add Skylake-X CPUs
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3 changed files with 107 additions and 3 deletions
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@ -75,8 +75,9 @@ enum _intel_bits_t {
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_3 = LBIT( 14 ),
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_5 = LBIT( 15 ),
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_7 = LBIT( 16 ),
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XEON_ = LBIT( 17 ),
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ATOM_ = LBIT( 18 ),
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_9 = LBIT( 17 ),
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XEON_ = LBIT( 18 ),
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ATOM_ = LBIT( 19 ),
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};
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typedef enum _intel_bits_t intel_bits_t;
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@ -332,6 +332,8 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 14, -1, -1, 78, 2, -1, -1, NC, CORE_|_M_|_5 , 0, "Skylake (Core m5)" },
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{ 6, 14, -1, -1, 78, 2, -1, -1, NC, CORE_|_M_|_3 , 0, "Skylake (Core m3)" },
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{ 6, 5, -1, -1, 85, 8, -1, -1, NC, XEON_, 0, "Skylake (Xeon Scalable)" },
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{ 6, 5, -1, -1, 85, -1, -1, -1, NC, CORE_|_I_|_9, 0, "Skylake-X (Core i9)" }, /* 10 to 18 cores */
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{ 6, 5, -1, -1, 85, -1, -1, -1, NC, CORE_|_I_|_7, 0, "Skylake-X (Core i7)" }, /* 6 to 8 cores */
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/* Kaby Lake CPUs (14nm): */
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{ 6, 14, -1, -1, 158, 4, -1, -1, NC, CORE_|_I_|_7 , 0, "Kaby Lake (Core i7)" },
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@ -671,7 +673,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
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bits |= bit_matchtable[i].bit;
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}
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if ((i = match_pattern(bs, "Core(TM) [im][357]")) != 0) {
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if ((i = match_pattern(bs, "Core(TM) [im][3579]")) != 0) {
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bits |= CORE_;
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i--;
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switch (bs[i + 9]) {
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@ -682,6 +684,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
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case '3': bits |= _3; break;
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case '5': bits |= _5; break;
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case '7': bits |= _7; break;
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case '9': bits |= _9; break;
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}
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}
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for (i = 0; i < COUNT_OF(matchtable); i++)
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