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https://github.com/anrieff/libcpuid
synced 2025-10-13 11:10:39 +00:00
Fixed many bugreports. Correct recognition for some Core2 Xeons, some ConroeLs, Sempron Codenames, some A64 and A64X2 codenames.
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@36 3b4be424-7ac5-41d7-8526-f4ddcb85d872
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1070fc3f25
commit
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10 changed files with 816 additions and 15 deletions
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@ -534,3 +534,7 @@ libcpuid_warn_fn_t cpuid_set_warn_function(libcpuid_warn_fn_t new_fn)
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return ret;
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}
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void cpuid_set_verbosiness_level(int level)
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{
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_current_verboselevel = level;
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}
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@ -635,6 +635,19 @@ typedef void (*libcpuid_warn_fn_t) (const char *msg);
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*/
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libcpuid_warn_fn_t cpuid_set_warn_function(libcpuid_warn_fn_t warn_fun);
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/**
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* @brief Sets the verbosiness level
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*
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* When the verbosiness level is above zero, some functions might print
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* diagnostic information about what are they doing. The higher the level is,
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* the more detail is printed. Level zero is guaranteed to omit all such
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* output. The output is written using the same machinery as the warnings,
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* @see cpuid_set_warn_function()
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*
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* @param level the desired verbosiness level. Useful values 0..2 inclusive
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*/
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void cpuid_set_verbosiness_level(int level);
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#ifdef __cplusplus
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}; /* extern "C" */
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#endif
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@ -16,3 +16,4 @@ cpu_clock_measure
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cpu_clock
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cpuid_lib_version
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cpuid_set_warn_function
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cpuid_set_verbosiness_level
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@ -31,6 +31,8 @@
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#include "libcpuid.h"
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#include "libcpuid_util.h"
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int _current_verboselevel;
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void match_features(const struct feature_map_t* matchtable, int count, uint32_t reg, struct cpu_id_t* data)
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{
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int i;
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@ -57,6 +59,17 @@ void warnf(const char* format, ...)
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_warn_fun(buff);
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}
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void debugf(int verboselevel, const char* format, ...)
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{
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char buff[1024];
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if (verboselevel > _current_verboselevel) return;
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va_list va;
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va_start(va, format);
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vsnprintf(buff, sizeof(buff), format, va);
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va_end(va);
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_warn_fun(buff);
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}
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static int score(const struct match_entry_t* entry, int family, int model,
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int stepping, int xfamily, int xmodel, int code)
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{
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@ -77,11 +90,17 @@ void match_cpu_codename(const struct match_entry_t* matchtable, int count,
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int bestindex = 0;
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int i, t;
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debugf(3, "Matching cpu f:%d, m:%d, s:%d, xf:%d, xm:%d, code:%d\n",
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data->family, data->model, data->stepping, data->ext_family,
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data->ext_model, code);
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for (i = 0; i < count; i++) {
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t = score(&matchtable[i], data->family, data->model,
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data->stepping, data->ext_model,
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data->ext_family, code);
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data->stepping, data->ext_family,
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data->ext_model, code);
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debugf(3, "Entry %d, `%s', score %d\n", i, matchtable[i].name, t);
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if (t > bestscore) {
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debugf(2, "Entry `%s' selected - best score so far (%d)\n", matchtable[i].name, t);
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bestscore = t;
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bestindex = i;
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}
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@ -51,6 +51,9 @@ __attribute__((format(printf, 1, 2)))
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#endif
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;
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void debugf(int verboselevel, const char* format, ...);
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extern libcpuid_warn_fn_t _warn_fun;
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extern int _current_verboselevel;
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#endif /* __LIBCPUID_UTIL_H__ */
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@ -63,6 +63,9 @@ enum _amd_code_t {
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TURION_X2_1M,
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SEMPRON_64_128K,
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SEMPRON_64_256K,
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SEMPRON_64_512K,
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M_SEMPRON_64_256K,
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M_SEMPRON_64_512K,
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SEMPRON_DUALCORE,
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PHENOM,
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PHENOM_X2,
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@ -143,9 +146,13 @@ const struct match_entry_t cpudb_amd[] = {
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{ 15, -1, -1, 15, -1, NO_CODE , "Unknown A64" },
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{ 15, -1, -1, 15, -1, OPTERON_SINGLE , "Opteron" },
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{ 15, -1, -1, 15, -1, OPTERON_DUALCORE , "Opteron (Dual Core)" },
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{ 15, 3, -1, 15, -1, OPTERON_SINGLE , "Opteron" },
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{ 15, 3, -1, 15, -1, OPTERON_DUALCORE , "Opteron (Dual Core)" },
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{ 15, -1, -1, 15, -1, ATHLON_64_512K , "Athlon 64 (512K)" },
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{ 15, -1, -1, 15, -1, ATHLON_64_1M , "Athlon 64 (1024K)" },
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{ 15, -1, -1, 15, 0x2c, ATHLON_64_512K , "Athlon 64 (Venice/512K)" },
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{ 15, -1, -1, 15, -1, ATHLON_64_X2_512K, "Athlon 64 X2 (512K)" },
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{ 15, -1, -1, 15, 0x6b, ATHLON_64_X2_512K, "Athlon 64 X2 (Brisbane/512K)" },
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{ 15, -1, -1, 15, -1, ATHLON_64_X2_1M , "Athlon 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, ATHLON_FX , "Athlon FX" },
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{ 15, -1, -1, 15, -1, ATHLON_64_FX , "Athlon 64 FX" },
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@ -155,6 +162,17 @@ const struct match_entry_t cpudb_amd[] = {
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{ 15, -1, -1, 15, -1, TURION_X2_1M , "Turion 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, SEMPRON_64_128K , "A64 Sempron (128K)" },
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{ 15, -1, -1, 15, -1, SEMPRON_64_256K , "A64 Sempron (256K)" },
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{ 15, -1, -1, 15, -1, SEMPRON_64_512K , "A64 Sempron (512K)" },
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{ 15, -1, -1, 15, 0x2c, SEMPRON_64_128K, "Sempron 64 (Palermo/128K)" },
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{ 15, -1, -1, 15, 0x2c, SEMPRON_64_256K, "Sempron 64 (Palermo/256K)" },
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{ 15, -1, -1, 15, 0x2f, SEMPRON_64_128K, "Sempron 64 (Palermo/128K)" },
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{ 15, -1, -1, 15, 0x2f, SEMPRON_64_256K, "Sempron 64 (Palermo/256K)" },
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{ 15, -1, -1, 15, 0x4f, SEMPRON_64_128K, "Sempron 64 (Manila/128K)" },
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{ 15, -1, -1, 15, 0x4f, SEMPRON_64_256K, "Sempron 64 (Manila/256K)" },
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{ 15, -1, -1, 15, 0x7f, SEMPRON_64_256K, "Sempron 64 (Sparta/256K)" },
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{ 15, -1, -1, 15, 0x7f, SEMPRON_64_512K, "Sempron 64 (Sparta/512K)" },
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{ 15, -1, -1, 15, -1, M_SEMPRON_64_256K, "Mobile Sempron 64 (Keene/256K)" },
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{ 15, -1, -1, 15, -1, M_SEMPRON_64_512K, "Mobile Sempron 64 (Keene/512K)" },
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{ 15, -1, -1, 15, -1, SEMPRON_DUALCORE , "A64 Sempron (Dual Core)" },
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/* K9 Architecture */
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@ -286,16 +304,18 @@ static amd_code_t decode_amd_codename_part1(const char *bs)
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else
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return TURION_64_512K;
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}
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if (strstr(bs, "Sempron(tm)")) return SEMPRON_64_128K;
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if (strstr(bs, "mobile") || strstr(bs, "Mobile")) {
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if (strstr(bs, "Athlon(tm) XP-M (LV)")) return ATHLON_XP_M_LV;
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if (strstr(bs, "Athlon(tm) XP")) return ATHLON_XP_M;
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if (strstr(bs, "Sempron(tm)")) return M_SEMPRON_64_256K;
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if (strstr(bs, "Athlon")) return MOBILE_ATHLON64;
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if (strstr(bs, "Duron")) return MOBILE_DURON;
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} else {
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if (strstr(bs, "Athlon(tm) XP")) return ATHLON_XP;
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if (strstr(bs, "Athlon(tm) MP")) return ATHLON_MP;
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if (strstr(bs, "Sempron(tm)")) return SEMPRON_64_128K;
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if (strstr(bs, "Duron")) return DURON;
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if (strstr(bs, "Athlon")) return ATHLON;
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}
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@ -311,8 +331,14 @@ static void decode_amd_codename(struct cpu_raw_data_t* raw, struct cpu_id_t* dat
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code = ATHLON_XP_BARTON;
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if (code == ATHLON_64_512K && data->l2_cache > 512)
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code = ATHLON_64_1M;
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if (code == SEMPRON_64_128K && data->l2_cache > 128)
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code = SEMPRON_64_256K;
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if (code == SEMPRON_64_128K && data->l2_cache > 128) {
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if (data->l2_cache == 256)
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code = SEMPRON_64_256K;
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else
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code = SEMPRON_64_512K;
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}
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if (code == M_SEMPRON_64_256K && data->l2_cache > 256)
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code = M_SEMPRON_64_512K;
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if (code == TURION_64_512K && data->l2_cache > 512)
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code = TURION_64_1M;
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if (code == TURION_X2_512K && data->l2_cache > 512)
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@ -159,7 +159,7 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 15, -1, -1, -1, MEROM_2M , "Merom (Core 2 Duo) 2048K" },
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{ 6, 15, -1, -1, -1, MEROM_4M , "Merom (Core 2 Duo) 4096K" },
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{ 6, 15, -1, -1, 15, CELERON , "Conroe-L (Celeron)" },
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{ 6, 6, -1, -1, 22, CELERON , "Conroe-L (Celeron)" },
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@ -173,6 +173,7 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 7, -1, -1, 23, WOLFDALE_2M , "Wolfdale (Core 2 Duo) 2M" },
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{ 6, 7, -1, -1, 23, WOLFDALE_3M , "Wolfdale (Core 2 Duo) 3M" },
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{ 6, 7, -1, -1, 23, WOLFDALE_6M , "Wolfdale (Core 2 Duo) 6M" },
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{ 6, 7, -1, -1, 23, XEON , "Xeon (Wolfdale)" },
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{ 6, 7, -1, -1, 23, MOBILE_CORE , "Penryn (Core 2 Duo)" },
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{ 6, 7, -1, -1, 23, PENRYN_3M , "Penryn (Core 2 Duo) 3M" },
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{ 6, 7, -1, -1, 23, PENRYN_6M , "Penryn (Core 2 Duo) 6M" },
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@ -198,6 +199,12 @@ const struct match_entry_t cpudb_intel[] = {
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{ 15, 3, -1, 15, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 4, -1, 15, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 6, -1, 15, -1, NO_CODE , "Pentium 4 (Cedar Mill)" },
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{ 15, 0, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Willamette)" },
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{ 15, 1, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Willamette)" },
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{ 15, 2, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Northwood)" },
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{ 15, 3, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Prescott)" },
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{ 15, 4, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Prescott)" },
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{ 15, 6, -1, 15, -1, MOBILE_PENTIUM , "Mobile P-4 (Cedar Mill)" },
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/* server CPUs */
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{ 15, 0, -1, 15, -1, XEON , "Xeon (Foster)" },
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{ XEON, "Xeon" },
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{ CELERON, "Celeron" },
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{ MOBILE_PENTIUM_M, "Pentium(R) M" },
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{ CORE_SOLO, "Pentium(R) Dual CPU" },
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{ PENTIUM_D, "Pentium(R) D" },
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{ PENTIUM, "Pentium" },
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{ CORE_SOLO, "Genuine Intel(R) CPU" },
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