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https://github.com/anrieff/libcpuid
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Add support for ARMv9.5-A CPUs
New AArch64 registers: - ID_AA64DFR2_EL1 - ID_AA64FPFR0_EL1 - ID_AA64ISAR3_EL1
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11 changed files with 365 additions and 15 deletions
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@ -154,9 +154,12 @@ __read_reg_on_cpu(int cpu, struct read_reg_t *read_reg, u_long cmd, struct threa
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case REQ_ID_AA64AFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64AFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR2_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64FPFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64FPFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR2_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR3: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR3_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR2_EL1, read_reg->value_64b); break;
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@ -111,9 +111,12 @@ static void __read_reg_on_cpu(void *info)
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case REQ_ID_AA64AFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64AFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64DFR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64DFR2_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64FPFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64FPFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR2_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64ISAR3: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64ISAR3_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR0: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR0_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR1: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR1_EL1, read_reg->value_64b); break;
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case REQ_ID_AA64MMFR2: cpuid_read_sysreg(NULL, AARCH64_REG_ID_AA64MMFR2_EL1, read_reg->value_64b); break;
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