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DB: add AMD Strix Point
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2 changed files with 10 additions and 1 deletions
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@ -184,6 +184,7 @@ enum _amd_bits_t {
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_APU_ = LBIT( 26 ),
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C86_ = LBIT( 27 ),
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_Z = LBIT( 28 ),
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_AI_ = LBIT( 29 ),
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};
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typedef enum _amd_bits_t amd_bits_t;
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@ -382,6 +382,10 @@ const struct match_entry_t cpudb_amd[] = {
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{ 15, -1, -1, 25, 117, -1, -1, -1, NC, RYZEN_|_5|_H , 0, "Ryzen 5 (Hawk Point)" },
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{ 15, -1, -1, 25, 117, -1, -1, -1, NC, RYZEN_|_5|_U , 0, "Ryzen 5 (Hawk Point)" },
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{ 15, -1, -1, 25, 117, -1, -1, -1, NC, RYZEN_|_3|_U , 0, "Ryzen 3 (Hawk Point)" },
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/* Zen 5 (2024) => https://en.wikichip.org/wiki/amd/microarchitectures/zen_5 */
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/* => Strix Point (Zen 5/RDNA3.5/XDNA2 based) */
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{ 15, -1, -1, 26, 36, -1, -1, -1, NC, RYZEN_|_AI_|_9 , 0, "Ryzen AI 9 (Strix Point)" },
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{ 15, -1, -1, 26, 36, -1, -1, -1, NC, RYZEN_|_AI_|_7 , 0, "Ryzen AI 7 (Strix Point)" },
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/* F M S EF EM #cores L2$ L3$ BC ModelBits ModelCode Name */
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};
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@ -587,9 +591,13 @@ static struct amd_code_and_bits_t decode_amd_codename_part1(const char *bs)
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if (amd_has_turion_modelname(bs)) {
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bits |= TURION_;
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}
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if ((i = match_pattern(bs, "Ryzen [3579Z]")) != 0) {
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if (((i = match_pattern(bs, "Ryzen [3579Z]")) != 0) || ((i = match_pattern(bs, "Ryzen AI [3579]")) != 0)) {
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bits |= RYZEN_;
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i--;
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if ((bs[i + 6] == 'A') && (bs[i + 7] == 'I')) {
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bits |= _AI_;
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i += 3; // "AI " offset
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}
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switch (bs[i + 6]) {
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case '3': bits |= _3; break;
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case '5': bits |= _5; break;
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