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Add AMD support for INFO_VOLTAGE in cpu_msrinfo()
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1 changed files with 13 additions and 0 deletions
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@ -417,6 +417,8 @@ static int perfmsr_measure(struct msr_driver_t* handle, int msr)
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#define PLATFORM_INFO_MSR 206
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#define PLATFORM_INFO_MSR 206
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#define PLATFORM_INFO_MSR_low 8
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#define PLATFORM_INFO_MSR_low 8
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#define PLATFORM_INFO_MSR_high 15
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#define PLATFORM_INFO_MSR_high 15
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#define MSR_PSTATE_S 0xC0010063
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#define MSR_PSTATE_0 0xC0010064
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static int get_bits_value(uint64_t val, int highbit, int lowbit)
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static int get_bits_value(uint64_t val, int highbit, int lowbit)
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{
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{
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@ -534,6 +536,17 @@ int cpu_msrinfo(struct msr_driver_t* handle, cpu_msrinfo_request_t which)
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double ret = (double) val / (1 << 13);
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double ret = (double) val / (1 << 13);
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return (ret > 0) ? (int) (ret * 100) : CPU_INVALID_VALUE;
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return (ret > 0) ? (int) (ret * 100) : CPU_INVALID_VALUE;
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}
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}
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else if(cpuid_get_vendor() == VENDOR_AMD)
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{
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/* http://support.amd.com/TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf
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MSRC001_0063[2:0] = CurPstate
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MSRC001_00[6B:64][15:9] = CpuVid */
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uint64_t CurPstate = cpu_rdmsr_range(handle, MSR_PSTATE_S, 2, 0, &error_indx);
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if(0 <= CurPstate && CurPstate <= 7) { // Support 8 P-states
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uint64_t CpuVid = cpu_rdmsr_range(handle, MSR_PSTATE_0 + CurPstate, 15, 9, &error_indx);
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return (int) (1.550 - 0.0125 * CpuVid) * 100; // 2.4.1.6.3 - Serial VID (SVI) Encodings
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}
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}
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return CPU_INVALID_VALUE;
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return CPU_INVALID_VALUE;
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}
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}
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case INFO_BCLK:
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case INFO_BCLK:
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