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Add up to 8 entries for CPUID leaf 04; push version to 0.3.0.

This is a backwards-incompatible binary change, which increases
sizeof(cpu_raw_data_t). Specifically, the cpu_raw_data_t::intel_fn4
array is increased from 4 to 8 elements, because on recent Hasells
(Crystalwell) there is a Level 4 cache, which should be encoded in
CPUID eax=4 ecx=4. However, we were only storing levels for eax=4
for ecx <= 3. Thus the raw data didn't have the relevant info.

There will be further changes to this, specifically to store
and print the level 4 cache in cpuid_tool.
This commit is contained in:
Veselin Georgiev 2016-06-03 04:35:01 +03:00
parent 3f36114b19
commit c31b5c0ae8
4 changed files with 9 additions and 8 deletions

View file

@ -1,4 +1,4 @@
AC_INIT([libcpuid CPU Identification library], [0.2.2], [libcpuid-devel@lists.sourceforge.net], [libcpuid]) AC_INIT([libcpuid CPU Identification library], [0.3.0], [libcpuid-devel@lists.sourceforge.net], [libcpuid])
AC_CONFIG_SRCDIR([libcpuid/libcpuid.h]) AC_CONFIG_SRCDIR([libcpuid/libcpuid.h])
AC_CONFIG_HEADERS([config.h]) AC_CONFIG_HEADERS([config.h])
AC_CONFIG_MACRO_DIR([m4]) AC_CONFIG_MACRO_DIR([m4])
@ -19,9 +19,10 @@ dnl 11:0:3 Version 0.1.4: just an identification change, to reflect the detect
dnl 12:1:0 Version 0.2.0: two more fields to cpu_id_t dnl 12:1:0 Version 0.2.0: two more fields to cpu_id_t
dnl 12:1:1 Version 0.2.1: more processors support dnl 12:1:1 Version 0.2.1: more processors support
dnl 12:1:2 Version 0.2.2: more processors support, *BSD/Solaris support, updates to MSR stuff dnl 12:1:2 Version 0.2.2: more processors support, *BSD/Solaris support, updates to MSR stuff
LIBCPUID_CURRENT=12 dnl 13:2:0 Version 0.3.0: increment max Intel leaf 04 entries to 8
LIBCPUID_AGE=1 LIBCPUID_CURRENT=13
LIBCPUID_REVISION=2 LIBCPUID_AGE=2
LIBCPUID_REVISION=0
AC_SUBST([LIBCPUID_AGE]) AC_SUBST([LIBCPUID_AGE])
AC_SUBST([LIBCPUID_REVISION]) AC_SUBST([LIBCPUID_REVISION])
AC_SUBST([LIBCPUID_CURRENT]) AC_SUBST([LIBCPUID_CURRENT])

View file

@ -373,7 +373,7 @@ int cpuid_get_raw_data(struct cpu_raw_data_t* data)
cpu_exec_cpuid(i, data->basic_cpuid[i]); cpu_exec_cpuid(i, data->basic_cpuid[i]);
for (i = 0; i < 32; i++) for (i = 0; i < 32; i++)
cpu_exec_cpuid(0x80000000 + i, data->ext_cpuid[i]); cpu_exec_cpuid(0x80000000 + i, data->ext_cpuid[i]);
for (i = 0; i < 4; i++) { for (i = 0; i < MAX_INTELFN4_LEVEL; i++) {
memset(data->intel_fn4[i], 0, sizeof(data->intel_fn4[i])); memset(data->intel_fn4[i], 0, sizeof(data->intel_fn4[i]));
data->intel_fn4[i][0] = 4; data->intel_fn4[i][0] = 4;
data->intel_fn4[i][2] = i; data->intel_fn4[i][2] = i;

View file

@ -41,7 +41,7 @@ RSC=rc.exe
# PROP Intermediate_Dir "Release" # PROP Intermediate_Dir "Release"
# PROP Target_Dir "" # PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /YX /FD /c # ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /YX /FD /c
# ADD CPP /nologo /MD /W3 /GX /O2 /D "NDEBUG" /D "WIN32" /D "_MBCS" /D "_LIB" /D VERSION=\"0.2.2\" /YX /FD /c # ADD CPP /nologo /MD /W3 /GX /O2 /D "NDEBUG" /D "WIN32" /D "_MBCS" /D "_LIB" /D VERSION=\"0.3.0\" /YX /FD /c
# ADD BASE RSC /l 0x409 /d "NDEBUG" # ADD BASE RSC /l 0x409 /d "NDEBUG"
# ADD RSC /l 0x409 /d "NDEBUG" # ADD RSC /l 0x409 /d "NDEBUG"
BSC32=bscmake.exe BSC32=bscmake.exe
@ -64,7 +64,7 @@ LIB32=link.exe -lib
# PROP Intermediate_Dir "Debug" # PROP Intermediate_Dir "Debug"
# PROP Target_Dir "" # PROP Target_Dir ""
# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /c # ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /c
# ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /D "_DEBUG" /D "WIN32" /D "_MBCS" /D "_LIB" /D VERSION=\"0.2.2\" /YX /FD /GZ /c # ADD CPP /nologo /MDd /W3 /Gm /GX /ZI /Od /D "_DEBUG" /D "WIN32" /D "_MBCS" /D "_LIB" /D VERSION=\"0.3.0\" /YX /FD /GZ /c
# ADD BASE RSC /l 0x409 /d "_DEBUG" # ADD BASE RSC /l 0x409 /d "_DEBUG"
# ADD RSC /l 0x409 /d "_DEBUG" # ADD RSC /l 0x409 /d "_DEBUG"
BSC32=bscmake.exe BSC32=bscmake.exe

View file

@ -37,7 +37,7 @@
#define CPU_FLAGS_MAX 128 #define CPU_FLAGS_MAX 128
#define MAX_CPUID_LEVEL 32 #define MAX_CPUID_LEVEL 32
#define MAX_EXT_CPUID_LEVEL 32 #define MAX_EXT_CPUID_LEVEL 32
#define MAX_INTELFN4_LEVEL 4 #define MAX_INTELFN4_LEVEL 8
#define MAX_INTELFN11_LEVEL 4 #define MAX_INTELFN11_LEVEL 4
#define CPU_HINTS_MAX 16 #define CPU_HINTS_MAX 16