mirror of
https://github.com/anrieff/libcpuid
synced 2025-07-02 14:04:15 +00:00
Support for Core i5/i3. The matchtables now have a column for L3 cache
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@87 3b4be424-7ac5-41d7-8526-f4ddcb85d872
This commit is contained in:
Veselin Georgiev
parent
e28b38aa1e
commit
d520a37569
5 changed files with 391 additions and 284 deletions
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@ -85,6 +85,7 @@ static int score(const struct match_entry_t* entry, const struct cpu_id_t* data,
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if (entry->ext_model == data->ext_model ) res++;
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if (entry->ncores == data->num_cores ) res++;
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if (entry->l2cache == data->l2_cache ) res++;
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if (entry->l3cache == data->l3_cache ) res++;
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if (entry->brand_code == brand_code ) res++;
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if (entry->model_code == model_code ) res++;
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return res;
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@ -156,7 +157,7 @@ int match_pattern(const char* s, const char* p)
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n = (int) strlen(s);
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m = (int) strlen(p);
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for (i = 0; i < n; i++) {
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if (xmatch_entry(s[i], p)) {
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if (xmatch_entry(s[i], p) != -1) {
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j = 0;
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k = 0;
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while (j < m && ((dj = xmatch_entry(s[i + k], p + j)) != -1)) {
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@ -38,7 +38,7 @@ void match_features(const struct feature_map_t* matchtable, int count,
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struct match_entry_t {
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int family, model, stepping, ext_family, ext_model;
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int ncores, l2cache, brand_code, model_code;
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int ncores, l2cache, l3cache, brand_code, model_code;
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char name[32];
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};
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@ -66,170 +66,170 @@ enum _amd_code_t {
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typedef enum _amd_code_t amd_code_t;
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const struct match_entry_t cpudb_amd[] = {
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{ -1, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown AMD CPU" },
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{ -1, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown AMD CPU" },
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/* 486 and the likes */
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{ 4, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown AMD 486" },
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{ 4, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "AMD 486DX2" },
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{ 4, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "AMD 486DX2WB" },
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{ 4, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "AMD 486DX4" },
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{ 4, 9, -1, -1, -1, 1, -1, NO_CODE , 0, "AMD 486DX4WB" },
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{ 4, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown AMD 486" },
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{ 4, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "AMD 486DX2" },
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{ 4, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "AMD 486DX2WB" },
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{ 4, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "AMD 486DX4" },
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{ 4, 9, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "AMD 486DX4WB" },
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/* Pentia clones */
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{ 5, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown AMD 586" },
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{ 5, 0, -1, -1, -1, 1, -1, NO_CODE , 0, "K5" },
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{ 5, 1, -1, -1, -1, 1, -1, NO_CODE , 0, "K5" },
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{ 5, 2, -1, -1, -1, 1, -1, NO_CODE , 0, "K5" },
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{ 5, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "K5" },
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{ 5, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown AMD 586" },
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{ 5, 0, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K5" },
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{ 5, 1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K5" },
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{ 5, 2, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K5" },
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{ 5, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K5" },
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/* The K6 */
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{ 5, 6, -1, -1, -1, 1, -1, NO_CODE , 0, "K6" },
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{ 5, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "K6" },
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{ 5, 6, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K6" },
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{ 5, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K6" },
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{ 5, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "K6-2" },
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{ 5, 9, -1, -1, -1, 1, -1, NO_CODE , 0, "K6-III" },
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{ 5, 10, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 11, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 12, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 13, -1, -1, -1, 1, -1, NO_CODE , 0, "K6-2+" },
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{ 5, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K6-2" },
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{ 5, 9, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K6-III" },
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{ 5, 10, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 11, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 12, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown K6" },
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{ 5, 13, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "K6-2+" },
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/* Athlon et al. */
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{ 6, 1, -1, -1, -1, 1, -1, NO_CODE , 0, "Athlon (Slot-A)" },
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{ 6, 2, -1, -1, -1, 1, -1, NO_CODE , 0, "Athlon (Slot-A)" },
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{ 6, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "Duron (Spitfire)" },
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{ 6, 4, -1, -1, -1, 1, -1, NO_CODE , 0, "Athlon (ThunderBird)" },
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{ 6, 1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Athlon (Slot-A)" },
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{ 6, 2, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Athlon (Slot-A)" },
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{ 6, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Duron (Spitfire)" },
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{ 6, 4, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Athlon (ThunderBird)" },
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{ 6, 6, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Athlon" },
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{ 6, 6, -1, -1, -1, 1, -1, ATHLON , 0, "Athlon (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, ATHLON_MP , 0, "Athlon MP (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, DURON , 0, "Duron (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, ATHLON_XP , 0, "Athlon XP" },
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{ 6, 6, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Athlon" },
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{ 6, 6, -1, -1, -1, 1, -1, -1, ATHLON , 0, "Athlon (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, -1, ATHLON_MP , 0, "Athlon MP (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, -1, DURON , 0, "Duron (Palomino)" },
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{ 6, 6, -1, -1, -1, 1, -1, -1, ATHLON_XP , 0, "Athlon XP" },
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{ 6, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Athlon XP" },
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{ 6, 7, -1, -1, -1, 1, -1, DURON , 0, "Duron (Morgan)" },
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{ 6, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Athlon XP" },
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{ 6, 7, -1, -1, -1, 1, -1, -1, DURON , 0, "Duron (Morgan)" },
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{ 6, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "Athlon XP" },
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{ 6, 8, -1, -1, -1, 1, -1, ATHLON , 0, "Athlon XP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, ATHLON_XP , 0, "Athlon XP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, DURON , 0, "Duron (Applebred)" },
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{ 6, 8, -1, -1, -1, 1, -1, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, 128, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, 256, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, ATHLON_MP , 0, "Athlon MP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, ATHLON_XP_M , 0, "Mobile Athlon (T-Bred)" },
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{ 6, 8, -1, -1, -1, 1, -1, ATHLON_XP_M_LV , 0, "Mobile Athlon (T-Bred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Athlon XP" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, ATHLON , 0, "Athlon XP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, ATHLON_XP , 0, "Athlon XP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, DURON , 0, "Duron (Applebred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, 128, -1, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, 256, -1, SEMPRON , 0, "Sempron (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, ATHLON_MP , 0, "Athlon MP (Thoroughbred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, ATHLON_XP_M , 0, "Mobile Athlon (T-Bred)" },
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{ 6, 8, -1, -1, -1, 1, -1, -1, ATHLON_XP_M_LV , 0, "Mobile Athlon (T-Bred)" },
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{ 6, 10, -1, -1, -1, 1, -1, NO_CODE , 0, "Athlon XP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 512, ATHLON_XP , 0, "Athlon XP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 512, SEMPRON , 0, "Sempron (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 256, SEMPRON , 0, "Sempron (Thorton)" },
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{ 6, 10, -1, -1, -1, 1, 256, ATHLON_XP , 0, "Athlon XP (Thorton)" },
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{ 6, 10, -1, -1, -1, 1, -1, ATHLON_MP , 0, "Athlon MP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, -1, ATHLON_XP_M , 0, "Mobile Athlon (Barton)" },
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{ 6, 10, -1, -1, -1, 1, -1, ATHLON_XP_M_LV , 0, "Mobile Athlon (Barton)" },
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{ 6, 10, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Athlon XP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 512, -1, ATHLON_XP , 0, "Athlon XP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 512, -1, SEMPRON , 0, "Sempron (Barton)" },
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{ 6, 10, -1, -1, -1, 1, 256, -1, SEMPRON , 0, "Sempron (Thorton)" },
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{ 6, 10, -1, -1, -1, 1, 256, -1, ATHLON_XP , 0, "Athlon XP (Thorton)" },
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{ 6, 10, -1, -1, -1, 1, -1, -1, ATHLON_MP , 0, "Athlon MP (Barton)" },
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{ 6, 10, -1, -1, -1, 1, -1, -1, ATHLON_XP_M , 0, "Mobile Athlon (Barton)" },
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{ 6, 10, -1, -1, -1, 1, -1, -1, ATHLON_XP_M_LV , 0, "Mobile Athlon (Barton)" },
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/* K8 Architecture */
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{ 15, -1, -1, 15, -1, 1, -1, NO_CODE , 0, "Unknown K8" },
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{ 15, -1, -1, 16, -1, 1, -1, NO_CODE , 0, "Unknown K9" },
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{ 15, -1, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Unknown K8" },
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{ 15, -1, -1, 16, -1, 1, -1, -1, NO_CODE , 0, "Unknown K9" },
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{ 15, -1, -1, 15, -1, 1, -1, NO_CODE , 0, "Unknown A64" },
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{ 15, -1, -1, 15, -1, 1, -1, OPTERON_SINGLE , 0, "Opteron" },
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{ 15, -1, -1, 15, -1, 2, -1, OPTERON_DUALCORE , 0, "Opteron (Dual Core)" },
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{ 15, 3, -1, 15, -1, 1, -1, OPTERON_SINGLE , 0, "Opteron" },
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{ 15, 3, -1, 15, -1, 2, -1, OPTERON_DUALCORE , 0, "Opteron (Dual Core)" },
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{ 15, -1, -1, 15, -1, 1, 512, ATHLON_64 , 0, "Athlon 64 (512K)" },
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{ 15, -1, -1, 15, -1, 1, 1024, ATHLON_64 , 0, "Athlon 64 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, -1, ATHLON_FX , 0, "Athlon FX" },
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{ 15, -1, -1, 15, -1, 1, -1, ATHLON_64_FX , 0, "Athlon 64 FX" },
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{ 15, -1, -1, 15, -1, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (512K)" },
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{ 15, -1, -1, 15, -1, 2, 1024, ATHLON_64_X2 , 0, "Athlon 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, 512, TURION_64 , 0, "Turion 64 (512K)" },
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{ 15, -1, -1, 15, -1, 1, 1024, TURION_64 , 0, "Turion 64 (1024K)" },
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{ 15, -1, -1, 15, -1, 2, 512, TURION_X2 , 0, "Turion 64 X2 (512K)" },
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{ 15, -1, -1, 15, -1, 2, 1024, TURION_X2 , 0, "Turion 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, 128, SEMPRON , 0, "A64 Sempron (128K)" },
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{ 15, -1, -1, 15, -1, 1, 256, SEMPRON , 0, "A64 Sempron (256K)" },
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{ 15, -1, -1, 15, -1, 1, 512, SEMPRON , 0, "A64 Sempron (512K)" },
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{ 15, -1, -1, 15, 0x4f, 1, 512, ATHLON_64 , 0, "Athlon 64 (Orleans/512K)" },
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{ 15, -1, -1, 15, 0x5f, 1, 512, ATHLON_64 , 0, "Athlon 64 (Orleans/512K)" },
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{ 15, -1, -1, 15, 0x2f, 1, 512, ATHLON_64 , 0, "Athlon 64 (Venice/512K)" },
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{ 15, -1, -1, 15, 0x2c, 1, 512, ATHLON_64 , 0, "Athlon 64 (Venice/512K)" },
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{ 15, -1, -1, 15, 0x1f, 1, 512, ATHLON_64 , 0, "Athlon 64 (Winchester/512K)" },
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{ 15, -1, -1, 15, 0x0c, 1, 512, ATHLON_64 , 0, "Athlon 64 (Newcastle/512K)" },
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{ 15, -1, -1, 15, 0x27, 1, 512, ATHLON_64 , 0, "Athlon 64 (San Diego/512K)" },
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{ 15, -1, -1, 15, 0x37, 1, 512, ATHLON_64 , 0, "Athlon 64 (San Diego/512K)" },
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{ 15, -1, -1, 15, 0x04, 1, 512, ATHLON_64 , 0, "Athlon 64 (ClawHammer/512K)" },
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{ 15, -1, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Unknown A64" },
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{ 15, -1, -1, 15, -1, 1, -1, -1, OPTERON_SINGLE , 0, "Opteron" },
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{ 15, -1, -1, 15, -1, 2, -1, -1, OPTERON_DUALCORE , 0, "Opteron (Dual Core)" },
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{ 15, 3, -1, 15, -1, 1, -1, -1, OPTERON_SINGLE , 0, "Opteron" },
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{ 15, 3, -1, 15, -1, 2, -1, -1, OPTERON_DUALCORE , 0, "Opteron (Dual Core)" },
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{ 15, -1, -1, 15, -1, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (512K)" },
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{ 15, -1, -1, 15, -1, 1, 1024, -1, ATHLON_64 , 0, "Athlon 64 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, -1, -1, ATHLON_FX , 0, "Athlon FX" },
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{ 15, -1, -1, 15, -1, 1, -1, -1, ATHLON_64_FX , 0, "Athlon 64 FX" },
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{ 15, -1, -1, 15, -1, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (512K)" },
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{ 15, -1, -1, 15, -1, 2, 1024, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, 512, -1, TURION_64 , 0, "Turion 64 (512K)" },
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{ 15, -1, -1, 15, -1, 1, 1024, -1, TURION_64 , 0, "Turion 64 (1024K)" },
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{ 15, -1, -1, 15, -1, 2, 512, -1, TURION_X2 , 0, "Turion 64 X2 (512K)" },
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{ 15, -1, -1, 15, -1, 2, 1024, -1, TURION_X2 , 0, "Turion 64 X2 (1024K)" },
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{ 15, -1, -1, 15, -1, 1, 128, -1, SEMPRON , 0, "A64 Sempron (128K)" },
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{ 15, -1, -1, 15, -1, 1, 256, -1, SEMPRON , 0, "A64 Sempron (256K)" },
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{ 15, -1, -1, 15, -1, 1, 512, -1, SEMPRON , 0, "A64 Sempron (512K)" },
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{ 15, -1, -1, 15, 0x4f, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Orleans/512K)" },
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{ 15, -1, -1, 15, 0x5f, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Orleans/512K)" },
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{ 15, -1, -1, 15, 0x2f, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Venice/512K)" },
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{ 15, -1, -1, 15, 0x2c, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Venice/512K)" },
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{ 15, -1, -1, 15, 0x1f, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Winchester/512K)" },
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{ 15, -1, -1, 15, 0x0c, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (Newcastle/512K)" },
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{ 15, -1, -1, 15, 0x27, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (San Diego/512K)" },
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{ 15, -1, -1, 15, 0x37, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (San Diego/512K)" },
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{ 15, -1, -1, 15, 0x04, 1, 512, -1, ATHLON_64 , 0, "Athlon 64 (ClawHammer/512K)" },
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{ 15, -1, -1, 15, 0x5f, 1, 1024, ATHLON_64 , 0, "Athlon 64 (Orleans/1024K)" },
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{ 15, -1, -1, 15, 0x27, 1, 1024, ATHLON_64 , 0, "Athlon 64 (San Diego/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x04, 1, 1024, ATHLON_64 , 0, "Athlon 64 (ClawHammer/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x5f, 1, 1024, -1, ATHLON_64 , 0, "Athlon 64 (Orleans/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x27, 1, 1024, -1, ATHLON_64 , 0, "Athlon 64 (San Diego/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x04, 1, 1024, -1, ATHLON_64 , 0, "Athlon 64 (ClawHammer/1024K)" },
|
||||
|
||||
{ 15, -1, -1, 15, 0x4b, 2, 256, SEMPRON_DUALCORE , 0, "Athlon 64 X2 (Windsor/256K)" },
|
||||
{ 15, -1, -1, 15, 0x4b, 2, 256, -1, SEMPRON_DUALCORE , 0, "Athlon 64 X2 (Windsor/256K)" },
|
||||
|
||||
{ 15, -1, -1, 15, 0x23, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (Toledo/512K)" },
|
||||
{ 15, -1, -1, 15, 0x4b, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/512K)" },
|
||||
{ 15, -1, -1, 15, 0x43, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/512K)" },
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (Brisbane/512K)" },
|
||||
{ 15, -1, -1, 15, 0x2b, 2, 512, ATHLON_64_X2 , 0, "Athlon 64 X2 (Manchester/512K)"},
|
||||
{ 15, -1, -1, 15, 0x23, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Toledo/512K)" },
|
||||
{ 15, -1, -1, 15, 0x4b, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/512K)" },
|
||||
{ 15, -1, -1, 15, 0x43, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/512K)" },
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Brisbane/512K)" },
|
||||
{ 15, -1, -1, 15, 0x2b, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Manchester/512K)"},
|
||||
|
||||
{ 15, -1, -1, 15, 0x23, 2, 1024, ATHLON_64_X2 , 0, "Athlon 64 X2 (Toledo/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x43, 2, 1024, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x23, 2, 1024, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Toledo/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x43, 2, 1024, -1, ATHLON_64_X2 , 0, "Athlon 64 X2 (Windsor/1024K)" },
|
||||
|
||||
{ 15, -1, -1, 15, 0x08, 1, 128, M_SEMPRON , 0, "Mobile Sempron 64 (Dublin/128K)"},
|
||||
{ 15, -1, -1, 15, 0x08, 1, 256, M_SEMPRON , 0, "Mobile Sempron 64 (Dublin/256K)"},
|
||||
{ 15, -1, -1, 15, 0x0c, 1, 256, SEMPRON , 0, "Sempron 64 (Paris)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 128, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 256, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 128, M_SEMPRON , 0, "Mobile Sempron 64 (Sonora/128K)"},
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 256, M_SEMPRON , 0, "Mobile Sempron 64 (Sonora/256K)"},
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 128, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 256, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 128, M_SEMPRON , 0, "Mobile Sempron 64 (Albany/128K)"},
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 256, M_SEMPRON , 0, "Mobile Sempron 64 (Albany/256K)"},
|
||||
{ 15, -1, -1, 15, 0x2f, 1, 128, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x2f, 1, 256, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x4f, 1, 128, SEMPRON , 0, "Sempron 64 (Manila/128K)" },
|
||||
{ 15, -1, -1, 15, 0x4f, 1, 256, SEMPRON , 0, "Sempron 64 (Manila/256K)" },
|
||||
{ 15, -1, -1, 15, 0x5f, 1, 128, SEMPRON , 0, "Sempron 64 (Manila/128K)" },
|
||||
{ 15, -1, -1, 15, 0x5f, 1, 256, SEMPRON , 0, "Sempron 64 (Manila/256K)" },
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 256, SEMPRON , 0, "Sempron 64 Dual (Sherman/256K)"},
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 512, SEMPRON , 0, "Sempron 64 Dual (Sherman/512K)"},
|
||||
{ 15, -1, -1, 15, 0x7f, 1, 256, SEMPRON , 0, "Sempron 64 (Sparta/256K)" },
|
||||
{ 15, -1, -1, 15, 0x7f, 1, 512, SEMPRON , 0, "Sempron 64 (Sparta/512K)" },
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 256, M_SEMPRON , 0, "Mobile Sempron 64 (Keene/256K)"},
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 512, M_SEMPRON , 0, "Mobile Sempron 64 (Keene/512K)"},
|
||||
{ 15, -1, -1, 15, -1, 2, -1, SEMPRON_DUALCORE , 0, "Sempron Dual Core" },
|
||||
{ 15, -1, -1, 15, 0x08, 1, 128, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Dublin/128K)"},
|
||||
{ 15, -1, -1, 15, 0x08, 1, 256, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Dublin/256K)"},
|
||||
{ 15, -1, -1, 15, 0x0c, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Paris)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 128, -1, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 128, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Sonora/128K)"},
|
||||
{ 15, -1, -1, 15, 0x1c, 1, 256, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Sonora/256K)"},
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 128, -1, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 128, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Albany/128K)"},
|
||||
{ 15, -1, -1, 15, 0x2c, 1, 256, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Albany/256K)"},
|
||||
{ 15, -1, -1, 15, 0x2f, 1, 128, -1, SEMPRON , 0, "Sempron 64 (Palermo/128K)" },
|
||||
{ 15, -1, -1, 15, 0x2f, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Palermo/256K)" },
|
||||
{ 15, -1, -1, 15, 0x4f, 1, 128, -1, SEMPRON , 0, "Sempron 64 (Manila/128K)" },
|
||||
{ 15, -1, -1, 15, 0x4f, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Manila/256K)" },
|
||||
{ 15, -1, -1, 15, 0x5f, 1, 128, -1, SEMPRON , 0, "Sempron 64 (Manila/128K)" },
|
||||
{ 15, -1, -1, 15, 0x5f, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Manila/256K)" },
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 256, -1, SEMPRON , 0, "Sempron 64 Dual (Sherman/256K)"},
|
||||
{ 15, -1, -1, 15, 0x6b, 2, 512, -1, SEMPRON , 0, "Sempron 64 Dual (Sherman/512K)"},
|
||||
{ 15, -1, -1, 15, 0x7f, 1, 256, -1, SEMPRON , 0, "Sempron 64 (Sparta/256K)" },
|
||||
{ 15, -1, -1, 15, 0x7f, 1, 512, -1, SEMPRON , 0, "Sempron 64 (Sparta/512K)" },
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 256, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Keene/256K)"},
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 512, -1, M_SEMPRON , 0, "Mobile Sempron 64 (Keene/512K)"},
|
||||
{ 15, -1, -1, 15, -1, 2, -1, -1, SEMPRON_DUALCORE , 0, "Sempron Dual Core" },
|
||||
|
||||
{ 15, -1, -1, 15, 0x24, 1, 512, TURION_64 , 0, "Turion 64 (Lancaster/512K)" },
|
||||
{ 15, -1, -1, 15, 0x24, 1, 1024, TURION_64 , 0, "Turion 64 (Lancaster/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x48, 2, 256, TURION_X2 , 0, "Turion X2 (Taylor)" },
|
||||
{ 15, -1, -1, 15, 0x48, 2, 512, TURION_X2 , 0, "Turion X2 (Trinidad)" },
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 512, TURION_64 , 0, "Turion 64 (Richmond)" },
|
||||
{ 15, -1, -1, 15, 0x68, 2, 256, TURION_X2 , 0, "Turion X2 (Tyler/256K)" },
|
||||
{ 15, -1, -1, 15, 0x68, 2, 512, TURION_X2 , 0, "Turion X2 (Tyler/512K)" },
|
||||
{ 15, -1, -1, 23, 3, 2, 512, TURION_X2 , 0, "Turion X2 (Griffin/512K)" },
|
||||
{ 15, -1, -1, 23, 3, 2, 1024, TURION_X2 , 0, "Turion X2 (Griffin/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x24, 1, 512, -1, TURION_64 , 0, "Turion 64 (Lancaster/512K)" },
|
||||
{ 15, -1, -1, 15, 0x24, 1, 1024, -1, TURION_64 , 0, "Turion 64 (Lancaster/1024K)" },
|
||||
{ 15, -1, -1, 15, 0x48, 2, 256, -1, TURION_X2 , 0, "Turion X2 (Taylor)" },
|
||||
{ 15, -1, -1, 15, 0x48, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Trinidad)" },
|
||||
{ 15, -1, -1, 15, 0x4c, 1, 512, -1, TURION_64 , 0, "Turion 64 (Richmond)" },
|
||||
{ 15, -1, -1, 15, 0x68, 2, 256, -1, TURION_X2 , 0, "Turion X2 (Tyler/256K)" },
|
||||
{ 15, -1, -1, 15, 0x68, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Tyler/512K)" },
|
||||
{ 15, -1, -1, 23, 3, 2, 512, -1, TURION_X2 , 0, "Turion X2 (Griffin/512K)" },
|
||||
{ 15, -1, -1, 23, 3, 2, 1024, -1, TURION_X2 , 0, "Turion X2 (Griffin/1024K)" },
|
||||
|
||||
/* K9 Architecture */
|
||||
{ 15, -1, -1, 16, -1, 1, -1, PHENOM , 0, "Unknown AMD Phenom" },
|
||||
{ 15, 2, -1, 16, -1, 1, -1, PHENOM , 0, "Phenom" },
|
||||
{ 15, 2, -1, 16, -1, 3, -1, PHENOM , 0, "Phenom X3 (Toliman)" },
|
||||
{ 15, 2, -1, 16, -1, 4, -1, PHENOM , 0, "Phenom X4 (Agena)" },
|
||||
{ 15, 2, -1, 16, -1, 3, 512, PHENOM , 0, "Phenom X3 (Toliman/256K)" },
|
||||
{ 15, 2, -1, 16, -1, 3, 512, PHENOM , 0, "Phenom X3 (Toliman/512K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 128, PHENOM , 0, "Phenom X4 (Agena/128K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 256, PHENOM , 0, "Phenom X4 (Agena/256K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 512, PHENOM , 0, "Phenom X4 (Agena/512K)" },
|
||||
{ 15, 2, -1, 16, -1, 2, 512, ATHLON_64_X2 , 0, "Athlon X2 (Kuma)" },
|
||||
{ 15, -1, -1, 16, -1, 1, -1, -1, PHENOM , 0, "Unknown AMD Phenom" },
|
||||
{ 15, 2, -1, 16, -1, 1, -1, -1, PHENOM , 0, "Phenom" },
|
||||
{ 15, 2, -1, 16, -1, 3, -1, -1, PHENOM , 0, "Phenom X3 (Toliman)" },
|
||||
{ 15, 2, -1, 16, -1, 4, -1, -1, PHENOM , 0, "Phenom X4 (Agena)" },
|
||||
{ 15, 2, -1, 16, -1, 3, 512, -1, PHENOM , 0, "Phenom X3 (Toliman/256K)" },
|
||||
{ 15, 2, -1, 16, -1, 3, 512, -1, PHENOM , 0, "Phenom X3 (Toliman/512K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 128, -1, PHENOM , 0, "Phenom X4 (Agena/128K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 256, -1, PHENOM , 0, "Phenom X4 (Agena/256K)" },
|
||||
{ 15, 2, -1, 16, -1, 4, 512, -1, PHENOM , 0, "Phenom X4 (Agena/512K)" },
|
||||
{ 15, 2, -1, 16, -1, 2, 512, -1, ATHLON_64_X2 , 0, "Athlon X2 (Kuma)" },
|
||||
/* Phenom II derivates: */
|
||||
{ 15, 4, -1, 16, -1, 4, -1, NO_CODE , 0, "Phenom (Deneb-based)" },
|
||||
{ 15, 4, -1, 16, -1, 1, 1024, SEMPRON , 0, "Sempron (Sargas)" },
|
||||
{ 15, 4, -1, 16, -1, 2, 1024, ATHLON_64_X2 , 0, "Athlon II X2 (Regor)" },
|
||||
{ 15, 4, -1, 16, -1, 2, 512, PHENOM2 , 0, "Phenom II X2 (Callisto)" },
|
||||
{ 15, 4, -1, 16, -1, 3, 512, PHENOM2 , 0, "Phenom II X3 (Heka)" },
|
||||
{ 15, 4, -1, 16, -1, 4, 512, PHENOM2 , 0, "Phenom II X4 (Deneb)" },
|
||||
{ 15, 4, -1, 16, -1, 4, -1, -1, NO_CODE , 0, "Phenom (Deneb-based)" },
|
||||
{ 15, 4, -1, 16, -1, 1, 1024, -1, SEMPRON , 0, "Sempron (Sargas)" },
|
||||
{ 15, 4, -1, 16, -1, 2, 1024, -1, ATHLON_64_X2 , 0, "Athlon II X2 (Regor)" },
|
||||
{ 15, 4, -1, 16, -1, 2, 512, -1, PHENOM2 , 0, "Phenom II X2 (Callisto)" },
|
||||
{ 15, 4, -1, 16, -1, 3, 512, -1, PHENOM2 , 0, "Phenom II X3 (Heka)" },
|
||||
{ 15, 4, -1, 16, -1, 4, 512, -1, PHENOM2 , 0, "Phenom II X4 (Deneb)" },
|
||||
|
||||
{ 15, 5, -1, 16, -1, 4, 512, ATHLON_64_X4 , 0, "Athlon II X4 (Propus)" },
|
||||
{ 15, 5, -1, 16, -1, 4, 512, -1, ATHLON_64_X4 , 0, "Athlon II X4 (Propus)" },
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -60,7 +60,9 @@ enum _intel_code_t {
|
|||
ATOM_DIAMONDVILLE,
|
||||
ATOM_DUALCORE,
|
||||
ATOM_SILVERTHORNE,
|
||||
CORE_Ix,
|
||||
CORE_I3,
|
||||
CORE_I5,
|
||||
CORE_I7,
|
||||
};
|
||||
typedef enum _intel_code_t intel_code_t;
|
||||
|
||||
|
|
@ -80,190 +82,197 @@ enum _intel_model_t {
|
|||
typedef enum _intel_model_t intel_model_t;
|
||||
|
||||
const struct match_entry_t cpudb_intel[] = {
|
||||
{ -1, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Intel CPU" },
|
||||
{ -1, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Intel CPU" },
|
||||
|
||||
/* i486 */
|
||||
{ 4, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown i486" },
|
||||
{ 4, 0, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX-25/33" },
|
||||
{ 4, 1, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX-50" },
|
||||
{ 4, 2, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 SX" },
|
||||
{ 4, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX2" },
|
||||
{ 4, 4, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 SL" },
|
||||
{ 4, 5, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 SX2" },
|
||||
{ 4, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX2 WriteBack" },
|
||||
{ 4, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX4" },
|
||||
{ 4, 9, -1, -1, -1, 1, -1, NO_CODE , 0, "i486 DX4 WriteBack" },
|
||||
{ 4, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown i486" },
|
||||
{ 4, 0, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX-25/33" },
|
||||
{ 4, 1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX-50" },
|
||||
{ 4, 2, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 SX" },
|
||||
{ 4, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX2" },
|
||||
{ 4, 4, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 SL" },
|
||||
{ 4, 5, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 SX2" },
|
||||
{ 4, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX2 WriteBack" },
|
||||
{ 4, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX4" },
|
||||
{ 4, 9, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "i486 DX4 WriteBack" },
|
||||
|
||||
/* All Pentia:
|
||||
Pentium 1 */
|
||||
{ 5, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Pentium" },
|
||||
{ 5, 0, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium A-Step" },
|
||||
{ 5, 1, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium 1 (0.8u)" },
|
||||
{ 5, 2, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium OverDrive" },
|
||||
{ 5, 4, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium MMX (0.25u)" },
|
||||
{ 5, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Pentium" },
|
||||
{ 5, 0, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium A-Step" },
|
||||
{ 5, 1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium 1 (0.8u)" },
|
||||
{ 5, 2, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium OverDrive" },
|
||||
{ 5, 4, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium 1 (0.35u)" },
|
||||
{ 5, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium MMX (0.25u)" },
|
||||
|
||||
/* Pentium 2 / 3 / M / Conroe / whatsnext - all P6 based. */
|
||||
{ 6, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown P6" },
|
||||
{ 6, 0, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium Pro" },
|
||||
{ 6, 1, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium Pro" },
|
||||
{ 6, 3, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium II (Klamath)" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium II (Deschutes)" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile Pentium II (Tonga)"},
|
||||
{ 6, 6, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium II (Dixon)" },
|
||||
{ 6, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown P6" },
|
||||
{ 6, 0, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium Pro" },
|
||||
{ 6, 1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium Pro" },
|
||||
{ 6, 3, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium II (Klamath)" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium II (Deschutes)" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile Pentium II (Tonga)"},
|
||||
{ 6, 6, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium II (Dixon)" },
|
||||
|
||||
{ 6, 3, -1, -1, -1, 1, -1, XEON , 0, "P-II Xeon" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, XEON , 0, "P-II Xeon" },
|
||||
{ 6, 6, -1, -1, -1, 1, -1, XEON , 0, "P-II Xeon" },
|
||||
{ 6, 3, -1, -1, -1, 1, -1, -1, XEON , 0, "P-II Xeon" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, -1, XEON , 0, "P-II Xeon" },
|
||||
{ 6, 6, -1, -1, -1, 1, -1, -1, XEON , 0, "P-II Xeon" },
|
||||
|
||||
{ 6, 5, -1, -1, -1, 1, -1, CELERON , 0, "P-II Celeron (no L2)" },
|
||||
{ 6, 6, -1, -1, -1, 1, -1, CELERON , 0, "P-II Celeron (128K)" },
|
||||
{ 6, 5, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-II Celeron (no L2)" },
|
||||
{ 6, 6, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-II Celeron (128K)" },
|
||||
|
||||
/* -------------------------------------------------- */
|
||||
|
||||
{ 6, 7, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium III (Katmai)" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium III (Coppermine)"},
|
||||
{ 6, 10, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium III (Coppermine)"},
|
||||
{ 6, 11, -1, -1, -1, 1, -1, NO_CODE , 0, "Pentium III (Tualatin)" },
|
||||
{ 6, 7, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium III (Katmai)" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium III (Coppermine)"},
|
||||
{ 6, 10, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium III (Coppermine)"},
|
||||
{ 6, 11, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Pentium III (Tualatin)" },
|
||||
|
||||
{ 6, 7, -1, -1, -1, 1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 10, -1, -1, -1, 1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 11, -1, -1, -1, 1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 7, -1, -1, -1, 1, -1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 10, -1, -1, -1, 1, -1, -1, XEON , 0, "P-III Xeon" },
|
||||
{ 6, 11, -1, -1, -1, 1, -1, -1, XEON , 0, "P-III Xeon" },
|
||||
|
||||
{ 6, 7, -1, -1, -1, 1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 10, -1, -1, -1, 1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 11, -1, -1, -1, 1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 7, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 8, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 10, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-III Celeron" },
|
||||
{ 6, 11, -1, -1, -1, 1, -1, -1, CELERON , 0, "P-III Celeron" },
|
||||
|
||||
/* Netburst based (Pentium 4 and later)
|
||||
classic P4s */
|
||||
{ 15, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Pentium 4" },
|
||||
{ 15, -1, -1, 15, -1, 1, -1, CELERON , 0, "Unknown P-4 Celeron" },
|
||||
{ 15, -1, -1, 15, -1, 1, -1, XEON , 0, "Unknown Xeon" },
|
||||
{ 15, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Pentium 4" },
|
||||
{ 15, -1, -1, 15, -1, 1, -1, -1, CELERON , 0, "Unknown P-4 Celeron" },
|
||||
{ 15, -1, -1, 15, -1, 1, -1, -1, XEON , 0, "Unknown Xeon" },
|
||||
|
||||
{ 15, 0, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Willamette)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Willamette)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Northwood)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Prescott)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Prescott)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, NO_CODE , 0, "Pentium 4 (Cedar Mill)" },
|
||||
{ 15, 0, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Willamette)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Willamette)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Northwood)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Prescott)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Prescott)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Cedar Mill)" },
|
||||
{ 15, 0, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Willamette)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Willamette)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Northwood)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Prescott)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Prescott)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium 4 (Cedar Mill)" },
|
||||
{ 15, 0, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Willamette)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Willamette)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Northwood)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Prescott)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Prescott)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, -1, MOBILE_PENTIUM , 0, "Mobile P-4 (Cedar Mill)" },
|
||||
|
||||
/* server CPUs */
|
||||
{ 15, 0, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Foster)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Foster)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Prestonia)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, XEONMP , 0, "Xeon (Gallatin)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Nocona)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Nocona)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, XEON_IRWIN , 0, "Xeon (Irwindale)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, XEONMP , 0, "Xeon (Cranford)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, XEON_POTOMAC , 0, "Xeon (Potomac)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, XEON , 0, "Xeon (Dempsey)" },
|
||||
{ 15, 0, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Foster)" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Foster)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Prestonia)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, -1, XEONMP , 0, "Xeon (Gallatin)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Nocona)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Nocona)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, XEON_IRWIN , 0, "Xeon (Irwindale)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, XEONMP , 0, "Xeon (Cranford)" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, XEON_POTOMAC , 0, "Xeon (Potomac)" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, -1, XEON , 0, "Xeon (Dempsey)" },
|
||||
|
||||
/* Pentium Ds */
|
||||
{ 15, 4, 4, 15, -1, 1, -1, NO_CODE , 0, "Pentium D" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, PENTIUM_D , 0, "Pentium D" },
|
||||
{ 15, 4, 7, 15, -1, 1, -1, NO_CODE , 0, "Pentium D" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, PENTIUM_D , 0, "Pentium D" },
|
||||
{ 15, 4, 4, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium D" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, PENTIUM_D , 0, "Pentium D" },
|
||||
{ 15, 4, 7, 15, -1, 1, -1, -1, NO_CODE , 0, "Pentium D" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, -1, PENTIUM_D , 0, "Pentium D" },
|
||||
|
||||
/* Celeron and Celeron Ds */
|
||||
{ 15, 1, -1, 15, -1, 1, -1, CELERON , 0, "P-4 Celeron (128K)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, CELERON , 0, "P-4 Celeron (128K)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, CELERON , 0, "Celeron D" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, CELERON , 0, "Celeron D" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, CELERON , 0, "Celeron D" },
|
||||
{ 15, 1, -1, 15, -1, 1, -1, -1, CELERON , 0, "P-4 Celeron (128K)" },
|
||||
{ 15, 2, -1, 15, -1, 1, -1, -1, CELERON , 0, "P-4 Celeron (128K)" },
|
||||
{ 15, 3, -1, 15, -1, 1, -1, -1, CELERON , 0, "Celeron D" },
|
||||
{ 15, 4, -1, 15, -1, 1, -1, -1, CELERON , 0, "Celeron D" },
|
||||
{ 15, 6, -1, 15, -1, 1, -1, -1, CELERON , 0, "Celeron D" },
|
||||
|
||||
/* -------------------------------------------------- */
|
||||
/* Intel Core microarchitecture - P6-based */
|
||||
|
||||
{ 6, 9, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Pentium M" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, MOBILE_PENTIUM_M , 0, "Unknown Pentium M" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, PENTIUM , 0, "Pentium M (Banias)" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, MOBILE_PENTIUM_M , 0, "Pentium M (Banias)" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, CELERON , 0, "Celeron M" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, PENTIUM , 0, "Pentium M (Dothan)" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, MOBILE_PENTIUM_M , 0, "Pentium M (Dothan)" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, CELERON , 0, "Celeron M" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Pentium M" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, -1, MOBILE_PENTIUM_M , 0, "Unknown Pentium M" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, -1, PENTIUM , 0, "Pentium M (Banias)" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, -1, MOBILE_PENTIUM_M , 0, "Pentium M (Banias)" },
|
||||
{ 6, 9, -1, -1, -1, 1, -1, -1, CELERON , 0, "Celeron M" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, -1, PENTIUM , 0, "Pentium M (Dothan)" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, -1, MOBILE_PENTIUM_M , 0, "Pentium M (Dothan)" },
|
||||
{ 6, 13, -1, -1, -1, 1, -1, -1, CELERON , 0, "Celeron M" },
|
||||
|
||||
{ 6, 12, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Atom" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, ATOM_DIAMONDVILLE , 0, "Atom (Diamondville)" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, ATOM_DUALCORE , 0, "Atom Dual-Core (Diamondville)" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, ATOM_SILVERTHORNE , 0, "Atom (Silverthorne)" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Atom" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, -1, ATOM_DIAMONDVILLE , 0, "Atom (Diamondville)" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, -1, ATOM_DUALCORE , 0, "Atom Dual-Core (Diamondville)" },
|
||||
{ 6, 12, -1, -1, -1, 1, -1, -1, ATOM_SILVERTHORNE , 0, "Atom (Silverthorne)" },
|
||||
|
||||
/* -------------------------------------------------- */
|
||||
|
||||
{ 6, 14, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Yonah" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
{ 6, 14, -1, -1, -1, 2, -1, CORE_DUO , 0, "Yonah (Core Duo)" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, MOBILE_CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
{ 6, 14, -1, -1, -1, 2, -1, MOBILE_CORE_DUO , 0, "Yonah (Core Duo)" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Yonah" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, -1, CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
{ 6, 14, -1, -1, -1, 2, -1, -1, CORE_DUO , 0, "Yonah (Core Duo)" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, -1, MOBILE_CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
{ 6, 14, -1, -1, -1, 2, -1, -1, MOBILE_CORE_DUO , 0, "Yonah (Core Duo)" },
|
||||
{ 6, 14, -1, -1, -1, 1, -1, -1, CORE_SOLO , 0, "Yonah (Core Solo)" },
|
||||
|
||||
{ 6, 15, -1, -1, -1, 1, -1, NO_CODE , 0, "Unknown Core 2" },
|
||||
{ 6, 15, -1, -1, -1, 2, 4096, CORE_DUO , 0, "Conroe (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, 1024, CORE_DUO , 0, "Conroe (Core 2 Duo) 1024K" },
|
||||
{ 6, 15, -1, -1, -1, 2, 512, CORE_DUO , 0, "Conroe (Core 2 Duo) 512K" },
|
||||
{ 6, 15, -1, -1, -1, 4, -1, QUAD_CORE , 0, "Kentsfield (Core 2 Quad)" },
|
||||
{ 6, 15, -1, -1, -1, 4, 4096, QUAD_CORE , 0, "Kentsfield (Core 2 Quad)" },
|
||||
{ 6, 15, -1, -1, -1, 400, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
{ 6, 15, -1, -1, -1, 2, 2048, CORE_DUO , 0, "Allendale (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, -1, MOBILE_CORE_DUO , 0, "Merom (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, 2048, MEROM , 0, "Merom (Core 2 Duo) 2048K" },
|
||||
{ 6, 15, -1, -1, -1, 2, 4096, MEROM , 0, "Merom (Core 2 Duo) 4096K" },
|
||||
{ 6, 15, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Unknown Core 2" },
|
||||
{ 6, 15, -1, -1, -1, 2, 4096, -1, CORE_DUO , 0, "Conroe (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, 1024, -1, CORE_DUO , 0, "Conroe (Core 2 Duo) 1024K" },
|
||||
{ 6, 15, -1, -1, -1, 2, 512, -1, CORE_DUO , 0, "Conroe (Core 2 Duo) 512K" },
|
||||
{ 6, 15, -1, -1, -1, 4, -1, -1, QUAD_CORE , 0, "Kentsfield (Core 2 Quad)" },
|
||||
{ 6, 15, -1, -1, -1, 4, 4096, -1, QUAD_CORE , 0, "Kentsfield (Core 2 Quad)" },
|
||||
{ 6, 15, -1, -1, -1, 400, -1, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
{ 6, 15, -1, -1, -1, 2, 2048, -1, CORE_DUO , 0, "Allendale (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, -1, -1, MOBILE_CORE_DUO , 0, "Merom (Core 2 Duo)" },
|
||||
{ 6, 15, -1, -1, -1, 2, 2048, -1, MEROM , 0, "Merom (Core 2 Duo) 2048K" },
|
||||
{ 6, 15, -1, -1, -1, 2, 4096, -1, MEROM , 0, "Merom (Core 2 Duo) 4096K" },
|
||||
|
||||
{ 6, 15, -1, -1, 15, 1, -1, CELERON , 0, "Conroe-L (Celeron)" },
|
||||
{ 6, 6, -1, -1, 22, 1, -1, CELERON , 0, "Conroe-L (Celeron)" },
|
||||
{ 6, 15, -1, -1, 15, 2, -1, CELERON , 0, "Conroe-L (Allendale)" },
|
||||
{ 6, 6, -1, -1, 22, 2, -1, CELERON , 0, "Conroe-L (Allendale)" },
|
||||
{ 6, 15, -1, -1, 15, 1, -1, -1, CELERON , 0, "Conroe-L (Celeron)" },
|
||||
{ 6, 6, -1, -1, 22, 1, -1, -1, CELERON , 0, "Conroe-L (Celeron)" },
|
||||
{ 6, 15, -1, -1, 15, 2, -1, -1, CELERON , 0, "Conroe-L (Allendale)" },
|
||||
{ 6, 6, -1, -1, 22, 2, -1, -1, CELERON , 0, "Conroe-L (Allendale)" },
|
||||
|
||||
|
||||
{ 6, 6, -1, -1, 22, 1, -1, NO_CODE , 0, "Unknown Core ?" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, NO_CODE , 0, "Unknown Core ?" },
|
||||
{ 6, 6, -1, -1, 22, 400, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
{ 6, 7, -1, -1, 23, 400, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
{ 6, 6, -1, -1, 22, 1, -1, -1, NO_CODE , 0, "Unknown Core ?" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, -1, NO_CODE , 0, "Unknown Core ?" },
|
||||
{ 6, 6, -1, -1, 22, 400, -1, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
{ 6, 7, -1, -1, 23, 400, -1, -1, MORE_THAN_QUADCORE, 0, "More than quad-core" },
|
||||
|
||||
{ 6, 7, -1, -1, 23, 1, -1, CORE_SOLO , 0, "Unknown Core 45nm" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, CORE_DUO , 0, "Unknown Core 45nm" },
|
||||
{ 6, 7, -1, -1, 23, 2, 2048, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 2M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 3072, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 3M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 6M" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, MOBILE_CORE_DUO , 0, "Penryn (Core 2 Duo)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 3072, PENRYN , 0, "Penryn (Core 2 Duo) 3M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, PENRYN , 0, "Penryn (Core 2 Duo) 6M" },
|
||||
{ 6, 7, -1, -1, 23, 1, 3072, QUAD_CORE , 0, "Yorkfield (Core 2 Quad) 3M"},
|
||||
{ 6, 7, -1, -1, 23, 1, 6144, QUAD_CORE , 0, "Yorkfield (Core 2 Quad) 6M"},
|
||||
{ 6, 7, -1, -1, 23, 1, -1, -1, CORE_SOLO , 0, "Unknown Core 45nm" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, -1, CORE_DUO , 0, "Unknown Core 45nm" },
|
||||
{ 6, 7, -1, -1, 23, 2, 2048, -1, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 2M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 3072, -1, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 3M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, -1, WOLFDALE , 0, "Wolfdale (Core 2 Duo) 6M" },
|
||||
{ 6, 7, -1, -1, 23, 1, -1, -1, MOBILE_CORE_DUO , 0, "Penryn (Core 2 Duo)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 3072, -1, PENRYN , 0, "Penryn (Core 2 Duo) 3M" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, -1, PENRYN , 0, "Penryn (Core 2 Duo) 6M" },
|
||||
{ 6, 7, -1, -1, 23, 1, 3072, -1, QUAD_CORE , 0, "Yorkfield (Core 2 Quad) 3M"},
|
||||
{ 6, 7, -1, -1, 23, 1, 6144, -1, QUAD_CORE , 0, "Yorkfield (Core 2 Quad) 6M"},
|
||||
|
||||
{ 6, 10, -1, -1, 26, 1, -1, CORE_Ix , 0, "Intel Core i7" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, CORE_Ix , 0, "Bloomfield (Core i7)" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, XEON_I7 , 0, "Xeon (Bloomfield)" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, XEON_GAINESTOWN , 0, "Xeon (Gainestown)" },
|
||||
{ 6, 5, -1, -1, 37, 2, -1, -1, NO_CODE , 0, "Unknown Core i3/i5 CPU" },
|
||||
{ 6, 5, -1, -1, 37, 2, -1, 3072, CORE_I5 , 0, "Arrandale (Core i5)" },
|
||||
{ 6, 5, -1, -1, 37, 2, -1, 4096, CORE_I5 , 0, "Clarkdale (Core i5)" },
|
||||
{ 6, 5, -1, -1, 37, 4, -1, 8192, CORE_I5 , 0, "Lynnfield (Core i5)" },
|
||||
{ 6, 5, -1, -1, 37, 2, -1, 3072, CORE_I3 , 0, "Arrandale (Core i3)" },
|
||||
{ 6, 5, -1, -1, 37, 2, -1, 4096, CORE_I3 , 0, "Clarkdale (Core i3)" },
|
||||
|
||||
{ 6, 10, -1, -1, 26, 1, -1, -1, CORE_I7 , 0, "Intel Core i7" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, -1, CORE_I7 , 0, "Bloomfield (Core i7)" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, -1, XEON_I7 , 0, "Xeon (Bloomfield)" },
|
||||
{ 6, 10, -1, -1, 26, 4, -1, -1, XEON_GAINESTOWN , 0, "Xeon (Gainestown)" },
|
||||
|
||||
|
||||
/* Core microarchitecture-based Xeons: */
|
||||
{ 6, 14, -1, -1, 14, 1, -1, XEON , 0, "Xeon LV" },
|
||||
{ 6, 15, -1, -1, 15, 2, 4096, XEON , _5100, "Xeon (Woodcrest)" },
|
||||
{ 6, 15, -1, -1, 15, 2, 2048, XEON , _3000, "Xeon (Conroe/2M)" },
|
||||
{ 6, 15, -1, -1, 15, 2, 4096, XEON , _3000, "Xeon (Conroe/4M)" },
|
||||
{ 6, 15, -1, -1, 15, 4, 4096, XEON , X3200, "Xeon (Kentsfield)" },
|
||||
{ 6, 15, -1, -1, 15, 4, 4096, XEON , _5300, "Xeon (Clovertown)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, XEON , _3100, "Xeon (Wolfdale)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, XEON , _5200, "Xeon (Wolfdale DP)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 6144, XEON , _5400, "Xeon (Harpertown)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 3072, XEON , X3300, "Xeon (Yorkfield/3M)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 6144, XEON , X3300, "Xeon (Yorkfield/6M)" },
|
||||
{ 6, 14, -1, -1, 14, 1, -1, -1, XEON , 0, "Xeon LV" },
|
||||
{ 6, 15, -1, -1, 15, 2, 4096, -1, XEON , _5100, "Xeon (Woodcrest)" },
|
||||
{ 6, 15, -1, -1, 15, 2, 2048, -1, XEON , _3000, "Xeon (Conroe/2M)" },
|
||||
{ 6, 15, -1, -1, 15, 2, 4096, -1, XEON , _3000, "Xeon (Conroe/4M)" },
|
||||
{ 6, 15, -1, -1, 15, 4, 4096, -1, XEON , X3200, "Xeon (Kentsfield)" },
|
||||
{ 6, 15, -1, -1, 15, 4, 4096, -1, XEON , _5300, "Xeon (Clovertown)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, -1, XEON , _3100, "Xeon (Wolfdale)" },
|
||||
{ 6, 7, -1, -1, 23, 2, 6144, -1, XEON , _5200, "Xeon (Wolfdale DP)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 6144, -1, XEON , _5400, "Xeon (Harpertown)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 3072, -1, XEON , X3300, "Xeon (Yorkfield/3M)" },
|
||||
{ 6, 7, -1, -1, 23, 4, 6144, -1, XEON , X3300, "Xeon (Yorkfield/6M)" },
|
||||
|
||||
/* Itaniums */
|
||||
{ 7, -1, -1, -1, -1, 1, -1, NO_CODE , 0, "Itanium" },
|
||||
{ 15, -1, -1, 16, -1, 1, -1, NO_CODE , 0, "Itanium 2" },
|
||||
{ 7, -1, -1, -1, -1, 1, -1, -1, NO_CODE , 0, "Itanium" },
|
||||
{ 15, -1, -1, 16, -1, 1, -1, -1, NO_CODE , 0, "Itanium 2" },
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -554,10 +563,14 @@ static intel_code_t get_brand_code(struct cpu_id_t* data)
|
|||
else if (strstr(bs, "Pentium"))
|
||||
code = MOBILE_PENTIUM;
|
||||
}
|
||||
if (match_pattern(bs, "Core(TM) i[357]")) {
|
||||
if ((i = match_pattern(bs, "Core(TM) i[357]")) != 0) {
|
||||
/* Core i3, Core i5 or Core i7 */
|
||||
need_matchtable = 0;
|
||||
code = CORE_Ix;
|
||||
switch (bs[i + 9]) {
|
||||
case '3': code = CORE_I3; break;
|
||||
case '5': code = CORE_I5; break;
|
||||
case '7': code = CORE_I7; break;
|
||||
}
|
||||
}
|
||||
if (need_matchtable) {
|
||||
for (i = 0; i < COUNT_OF(matchtable); i++)
|
||||
|
|
|
|||
|
|
@ -4051,3 +4051,96 @@ intel_fn11[3]=00000000 00000000 00000000 00000000
|
|||
Athlon II X4 (Propus)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni monitor cx16 syscall popcnt mmxext 3dnow 3dnowext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd stc 100mhzsteps hwpstate constant_tsc
|
||||
--------------------------------------------------------------------------------
|
||||
basic_cpuid[0]=0000000b 756e6547 6c65746e 49656e69
|
||||
basic_cpuid[1]=00020655 00100800 009ae3bd bfebfbff
|
||||
basic_cpuid[2]=55035a01 00f0b2dd 00000000 09ca212c
|
||||
basic_cpuid[3]=00000000 00000000 00000000 00000000
|
||||
basic_cpuid[4]=1c004121 01c0003f 0000003f 00000000
|
||||
basic_cpuid[5]=00000040 00000040 00000003 00001120
|
||||
basic_cpuid[6]=00000007 00000002 00000001 00000000
|
||||
basic_cpuid[7]=00000000 00000000 00000000 00000000
|
||||
basic_cpuid[8]=00000000 00000000 00000000 00000000
|
||||
basic_cpuid[9]=00000000 00000000 00000000 00000000
|
||||
basic_cpuid[10]=07300403 00000004 00000000 00000603
|
||||
basic_cpuid[11]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[12]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[13]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[14]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[15]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[16]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[17]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[18]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[19]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[20]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[21]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[22]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[23]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[24]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[25]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[26]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[27]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[28]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[29]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[30]=00000001 00000002 00000100 00000000
|
||||
basic_cpuid[31]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[0]=80000008 00000000 00000000 00000000
|
||||
ext_cpuid[1]=00000000 00000000 00000001 28000000
|
||||
ext_cpuid[2]=65746e49 2952286c 726f4320 4d542865
|
||||
ext_cpuid[3]=35692029 55504320 20202020 4d202020
|
||||
ext_cpuid[4]=30353420 20402020 30342e32 007a4847
|
||||
ext_cpuid[5]=00000000 00000000 00000000 00000000
|
||||
ext_cpuid[6]=00000000 00000000 01006040 00000000
|
||||
ext_cpuid[7]=00000000 00000000 00000000 00000100
|
||||
ext_cpuid[8]=00003024 00000000 00000000 00000000
|
||||
ext_cpuid[9]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[10]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[11]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[12]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[13]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[14]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[15]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[16]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[17]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[18]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[19]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[20]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[21]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[22]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[23]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[24]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[25]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[26]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[27]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[28]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[29]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[30]=00000001 00000002 00000100 00000000
|
||||
ext_cpuid[31]=00000001 00000002 00000100 00000000
|
||||
intel_fn4[0]=1c004121 01c0003f 0000003f 00000000
|
||||
intel_fn4[1]=1c004122 00c0003f 0000007f 00000000
|
||||
intel_fn4[2]=1c004143 01c0003f 000001ff 00000000
|
||||
intel_fn4[3]=1c03c163 02c0003f 00000fff 00000002
|
||||
intel_fn11[0]=00000001 00000002 00000100 00000000
|
||||
intel_fn11[1]=00000004 00000004 00000201 00000000
|
||||
intel_fn11[2]=00000000 00000000 00000002 00000000
|
||||
intel_fn11[3]=00000000 00000000 00000003 00000000
|
||||
--------------------------------------------------------------------------------
|
||||
6
|
||||
5
|
||||
5
|
||||
6
|
||||
37
|
||||
2
|
||||
4
|
||||
32
|
||||
32
|
||||
256
|
||||
3072
|
||||
8
|
||||
8
|
||||
12
|
||||
64
|
||||
64
|
||||
64
|
||||
Arrandale (Core i5)
|
||||
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lm lahf_lm
|
||||
--------------------------------------------------------------------------------
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue