From d5a82d6f646c82f9a67c02ec118e351526387664 Mon Sep 17 00:00:00 2001 From: The Tumultuous Unicorn Of Darkness Date: Sat, 30 Nov 2024 12:18:41 +0100 Subject: [PATCH] DB: use correct _intel_model_t enum value for Meteor Lake CPUs --- libcpuid/recog_intel.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/libcpuid/recog_intel.c b/libcpuid/recog_intel.c index 08ad472..1e63dd5 100644 --- a/libcpuid/recog_intel.c +++ b/libcpuid/recog_intel.c @@ -72,7 +72,7 @@ enum _intel_model_t { _x3xx, /* Xeon Bronze/Silver/Gold/Platinum x3xx */ _x4xx, /* Xeon Bronze/Silver/Gold/Platinum/Max x4xx */ _x5xx, /* Xeon Bronze/Silver/Gold/Platinum x5xx */ - _1xx, /* Core Ultra [579] 1xx */ + _1xx, /* Core Ultra [3579] 1xx */ }; typedef enum _intel_model_t intel_model_t; @@ -545,12 +545,12 @@ const struct match_entry_t cpudb_intel[] = { { 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_SILVER_ , _x5xx, "Emerald Rapids-SP (Xeon Silver)" }, // Xeon Silver (4500) { 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_BRONZE_ , _x5xx, "Emerald Rapids-SP (Xeon Bronze)" }, // Xeon Bronze (3500) - /* Meteor Lake CPUs (2023, 1st Core Ultra gen, Intel 4) => https://en.wikichip.org/wiki/intel/microarchitectures/meteor_lake */ - { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_9|_H, _x1xx, "Meteor Lake-H (Core Ultra 9)" }, - { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_H, _x1xx, "Meteor Lake-H (Core Ultra 7)" }, - { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_H, _x1xx, "Meteor Lake-H (Core Ultra 5)" }, - { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_U, _x1xx, "Meteor Lake-U (Core Ultra 7)" }, - { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_U, _x1xx, "Meteor Lake-U (Core Ultra 5)" }, + /* Meteor Lake CPUs (2023, Core Ultra Series 1 processors, Intel 4) => https://en.wikichip.org/wiki/intel/microarchitectures/meteor_lake */ + { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_9|_H, _1xx, "Meteor Lake-H (Core Ultra 9)" }, + { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_H, _1xx, "Meteor Lake-H (Core Ultra 7)" }, + { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_H, _1xx, "Meteor Lake-H (Core Ultra 5)" }, + { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_U, _1xx, "Meteor Lake-U (Core Ultra 7)" }, + { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_U, _1xx, "Meteor Lake-U (Core Ultra 5)" }, /* F M S EF EM #cores L2$ L3$ BC ModelBits ModelCode Name */ @@ -943,7 +943,7 @@ static intel_model_t get_model_code(struct cpu_id_t* data) if ((bs[i] == '1') && (bs[i+1] == '4')) return _14xxx; return UNKNOWN; } - else if ((i = match_pattern(bs, "Core(TM) Ultra [579]")) != 0) { + else if ((i = match_pattern(bs, "Core(TM) Ultra [3579]")) != 0) { i += 16; if (i + 3 >= l) return UNKNOWN; if (bs[i] == '1') return _1xx;