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https://github.com/anrieff/libcpuid
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Add support for AMD leaf 80000026h
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3 changed files with 21 additions and 0 deletions
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@ -650,6 +650,10 @@ static int cpuid_serialize_raw_data_internal(struct cpu_raw_data_t* single_raw,
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fprintf(f, "amd_fn8000001dh[%d]=%08x %08x %08x %08x\n", i,
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raw_ptr->amd_fn8000001dh[i][EAX], raw_ptr->amd_fn8000001dh[i][EBX],
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raw_ptr->amd_fn8000001dh[i][ECX], raw_ptr->amd_fn8000001dh[i][EDX]);
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for (i = 0; i < MAX_AMDFN80000026H_LEVEL; i++)
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fprintf(f, "amd_fn80000026h[%d]=%08x %08x %08x %08x\n", i,
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raw_ptr->amd_fn80000026h[i][EAX], raw_ptr->amd_fn80000026h[i][EBX],
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raw_ptr->amd_fn80000026h[i][ECX], raw_ptr->amd_fn80000026h[i][EDX]);
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break;
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case ARCHITECTURE_ARM:
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fprintf(f, "arm_midr=%016lx\n", raw_ptr->arm_midr);
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@ -778,6 +782,9 @@ static int cpuid_deserialize_raw_data_internal(struct cpu_raw_data_t* single_raw
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else if ((sscanf(line, "amd_fn8000001dh[%d]=%x %x %x %x", &i, &eax, &ebx, &ecx, &edx) >= 5) && (i >= 0) && (i < MAX_AMDFN8000001DH_LEVEL)) {
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RAW_ASSIGN_LINE_X86(raw_ptr->amd_fn8000001dh[i]);
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}
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else if ((sscanf(line, "amd_fn80000026h[%d]=%x %x %x %x", &i, &eax, &ebx, &ecx, &edx) >= 5) && (i >= 0) && (i < MAX_AMDFN80000026H_LEVEL)) {
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RAW_ASSIGN_LINE_X86(raw_ptr->amd_fn80000026h[i]);
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}
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else if ((sscanf(line, "arm_midr=%lx", &arm_reg) >= 1)) {
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RAW_ASSIGN_LINE_ARM(raw_ptr->arm_midr);
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}
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@ -840,6 +847,7 @@ static int cpuid_deserialize_raw_data_internal(struct cpu_raw_data_t* single_raw
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case 0x00000012: RAW_ASSIGN_LINE_X86(raw_ptr->intel_fn12h[i]); break;
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case 0x00000014: RAW_ASSIGN_LINE_X86(raw_ptr->intel_fn14h[i]); break;
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case 0x8000001D: RAW_ASSIGN_LINE_X86(raw_ptr->amd_fn8000001dh[i]); break;
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case 0x80000026: RAW_ASSIGN_LINE_X86(raw_ptr->amd_fn80000026h[i]); break;
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default: break;
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}
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}
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@ -1245,6 +1253,12 @@ int cpuid_get_raw_data(struct cpu_raw_data_t* data)
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data->amd_fn8000001dh[i][ECX] = i;
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cpu_exec_cpuid_ext(data->amd_fn8000001dh[i]);
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}
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for (i = 0; i < MAX_AMDFN80000026H_LEVEL; i++) {
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memset(data->amd_fn80000026h[i], 0, sizeof(data->amd_fn80000026h[i]));
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data->amd_fn80000026h[i][EAX] = 0x80000026;
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data->amd_fn80000026h[i][ECX] = i;
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cpu_exec_cpuid_ext(data->amd_fn80000026h[i]);
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}
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#elif defined(PLATFORM_ARM)
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/* We cannot support ARM CPUs running in 32-bit mode, because the Main ID Register is accessible only in privileged modes
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Some related links:
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@ -313,6 +313,12 @@ struct cpu_raw_data_t {
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* ecx = 0, 1, 2... */
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uint32_t amd_fn8000001dh[MAX_AMDFN8000001DH_LEVEL][NUM_REGS];
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/** when the CPU is AMD and supports leaf 80000026h
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* (Extended CPU Topology leaf)
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* this stores the result of CPUID with eax = 80000026h and
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* ecx = 0, 1, 2... */
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uint32_t amd_fn80000026h[MAX_AMDFN80000026H_LEVEL][NUM_REGS];
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/** when then CPU is ARM-based and supports MIDR
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* (Main ID Register) */
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uint64_t arm_midr;
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@ -43,6 +43,7 @@
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#define MAX_INTELFN12H_LEVEL 4
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#define MAX_INTELFN14H_LEVEL 4
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#define MAX_AMDFN8000001DH_LEVEL 4
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#define MAX_AMDFN80000026H_LEVEL 4
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#define MAX_ARM_ID_AA64DFR_REGS 2
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#define MAX_ARM_ID_AA64ISAR_REGS 3
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#define MAX_ARM_ID_AA64MMFR_REGS 5
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