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https://github.com/anrieff/libcpuid
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Support for Intel Conroe-L, lesser than 2MB cache Conroes, Core i7, Wolfdale, Penryn, Yorkfield, P4 Cedar Mill and Xeon Clovertown
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@25 3b4be424-7ac5-41d7-8526-f4ddcb85d872
This commit is contained in:
Veselin Georgiev
parent
f7e5bafc7b
commit
ef4d92a9ea
1 changed files with 94 additions and 47 deletions
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@ -44,8 +44,14 @@ enum _intel_code_t {
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NOT_CELERON,
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CORE_SOLO,
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CORE_DUO,
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CORE_DUO_512K,
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CORE_DUO_1024K,
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ALLENDALE,
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KENTSFIELD,
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WOLFDALE,
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PENRYN,
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QUAD_CORE,
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DUAL_CORE_HT,
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QUAD_CORE_HT,
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MORE_THAN_QUADCORE,
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PENTIUM_D,
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ATOM_DIAMONDVILLE,
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@ -136,55 +142,70 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 15, -1, -1, -1, NO_CODE , "Unknown Core 2" },
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{ 6, 15, -1, -1, -1, CORE_DUO , "Conroe (Core 2 Duo)" },
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{ 6, 15, -1, -1, -1, KENTSFIELD , "Kentsfield" },
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{ 6, 15, -1, -1, -1, CORE_DUO_1024K , "Conroe (Core 2 Duo) 1024K" },
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{ 6, 15, -1, -1, -1, CORE_DUO_512K , "Conroe (Core 2 Duo) 512K" },
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{ 6, 15, -1, -1, -1, QUAD_CORE , "Kentsfield (Core 2 Quad)" },
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{ 6, 15, -1, -1, -1, MORE_THAN_QUADCORE, "More than quad-core" },
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{ 6, 15, -1, -1, -1, ALLENDALE , "Allendale (Core 2 Duo)" },
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{ 6, 15, -1, -1, -1, XEON , "Xeon (Clovertown) Quad" },
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{ 6, 6, -1, -1, 22, CELERON , "Conroe-L (Celeron)" },
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{ 6, -1, -1, -1, 22, NO_CODE , "Unknown Core ?" },
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{ 6, -1, -1, -1, 23, NO_CODE , "Unknown Core ?" },
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{ 6, -1, -1, -1, 22, MORE_THAN_QUADCORE, "More than quad-core" },
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{ 6, -1, -1, -1, 23, MORE_THAN_QUADCORE, "More than quad-core" },
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{ 6, -1, -1, -1, 23, WOLFDALE , "Wolfdale (Core 2 Duo)" },
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{ 6, -1, -1, -1, 23, PENRYN , "Penryn (Core 2 Duo)" },
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{ 6, -1, -1, -1, 23, QUAD_CORE , "Yorkfield (Core 2 Quad)" },
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{ 6, 10, -1, -1, 26, NO_CODE , "Intel Core i7" },
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{ 6, 10, -1, -1, 26, QUAD_CORE_HT , "Bloomfield (Core i7)" },
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{ 6, 16, -1, -1, -1, NO_CODE , "Unknown Core ?" }, // future ones
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{ 6, 17, -1, -1, -1, NO_CODE , "Unknown Core ?" }, // future ones
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{ 6, 16, -1, -1, -1, MORE_THAN_QUADCORE, "More than quad-core" }, // future ones
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{ 6, 17, -1, -1, -1, MORE_THAN_QUADCORE, "More than quad-core" }, // future ones
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/* Itaniums */
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{ 7, -1, -1, -1, -1, NO_CODE , "Itanium" },
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{ 15, -1, -1, 1, -1, NO_CODE , "Itanium 2" },
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{ 15, -1, -1, 16, -1, NO_CODE , "Itanium 2" },
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/* Netburst based (Pentium 4 and later)
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classic P4s */
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{ 15, -1, -1, 0, -1, NO_CODE , "Unknown Pentium 4" },
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{ 15, -1, -1, 0, -1, CELERON , "Unknown P-4 Celeron" },
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{ 15, -1, -1, 0, -1, XEON , "Unknown Xeon" },
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{ 15, -1, -1, -1, -1, NO_CODE , "Unknown Pentium 4" },
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{ 15, -1, -1, 15, -1, CELERON , "Unknown P-4 Celeron" },
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{ 15, -1, -1, 15, -1, XEON , "Unknown Xeon" },
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{ 15, 0, -1, 0, -1, NO_CODE , "Pentium 4 (Willamette)" },
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{ 15, 1, -1, 0, -1, NO_CODE , "Pentium 4 (Willamette)" },
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{ 15, 2, -1, 0, -1, NO_CODE , "Pentium 4 (Northwood)" },
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{ 15, 3, -1, 0, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 4, -1, 0, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 0, -1, 15, -1, NO_CODE , "Pentium 4 (Willamette)" },
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{ 15, 1, -1, 15, -1, NO_CODE , "Pentium 4 (Willamette)" },
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{ 15, 2, -1, 15, -1, NO_CODE , "Pentium 4 (Northwood)" },
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{ 15, 3, -1, 15, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 4, -1, 15, -1, NO_CODE , "Pentium 4 (Prescott)" },
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{ 15, 6, -1, 15, -1, NO_CODE , "Pentium 4 (Cedar Mill)" },
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/* server CPUs */
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{ 15, 0, -1, 0, -1, XEON , "Xeon (Foster)" },
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{ 15, 1, -1, 0, -1, XEON , "Xeon (Foster)" },
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{ 15, 2, -1, 0, -1, XEON , "Xeon (Prestonia)" },
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{ 15, 2, -1, 0, -1, XEONMP , "Xeon (Gallatin)" },
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{ 15, 3, -1, 0, -1, XEON , "Xeon (Nocona)" },
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{ 15, 4, -1, 0, -1, XEON , "Xeon (Nocona)" },
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{ 15, 4, -1, 0, -1, XEON_IRWIN , "Xeon (Irwindale)" },
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{ 15, 4, -1, 0, -1, XEONMP , "Xeon (Cranford)" },
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{ 15, 4, -1, 0, -1, XEON_POTOMAC , "Xeon (Potomac)" },
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{ 15, 6, -1, 0, -1, XEON , "Xeon 5000" },
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{ 15, 0, -1, 15, -1, XEON , "Xeon (Foster)" },
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{ 15, 1, -1, 15, -1, XEON , "Xeon (Foster)" },
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{ 15, 2, -1, 15, -1, XEON , "Xeon (Prestonia)" },
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{ 15, 2, -1, 15, -1, XEONMP , "Xeon (Gallatin)" },
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{ 15, 3, -1, 15, -1, XEON , "Xeon (Nocona)" },
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{ 15, 4, -1, 15, -1, XEON , "Xeon (Nocona)" },
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{ 15, 4, -1, 15, -1, XEON_IRWIN , "Xeon (Irwindale)" },
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{ 15, 4, -1, 15, -1, XEONMP , "Xeon (Cranford)" },
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{ 15, 4, -1, 15, -1, XEON_POTOMAC , "Xeon (Potomac)" },
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{ 15, 6, -1, 15, -1, XEON , "Xeon 5000" },
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/* Pentium Ds */
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{ 15, 4, 4, 0, -1, NO_CODE , "Pentium D" },
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{ 15, 4, -1, 0, -1, PENTIUM_D , "Pentium D" },
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{ 15, 4, 7, 0, -1, NO_CODE , "Pentium D" },
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{ 15, 6, -1, 0, -1, PENTIUM_D , "Pentium D" },
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{ 15, 4, 4, 15, -1, NO_CODE , "Pentium D" },
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{ 15, 4, -1, 15, -1, PENTIUM_D , "Pentium D" },
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{ 15, 4, 7, 15, -1, NO_CODE , "Pentium D" },
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{ 15, 6, -1, 15, -1, PENTIUM_D , "Pentium D" },
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/* Celeron and Celeron Ds */
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{ 15, 1, -1, 0, -1, CELERON , "P-4 Celeron (128K)" },
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{ 15, 2, -1, 0, -1, CELERON , "P-4 Celeron (128K)" },
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{ 15, 3, -1, 0, -1, CELERON , "Celeron D" },
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{ 15, 4, -1, 0, -1, CELERON , "Celeron D" },
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{ 15, 6, -1, 0, -1, CELERON , "Celeron D" },
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{ 15, 1, -1, 15, -1, CELERON , "P-4 Celeron (128K)" },
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{ 15, 2, -1, 15, -1, CELERON , "P-4 Celeron (128K)" },
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{ 15, 3, -1, 15, -1, CELERON , "Celeron D" },
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{ 15, 4, -1, 15, -1, CELERON , "Celeron D" },
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{ 15, 6, -1, 15, -1, CELERON , "Celeron D" },
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};
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@ -458,14 +479,40 @@ static void decode_intel_codename(struct cpu_raw_data_t* raw, struct cpu_id_t* d
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if (code == CORE_SOLO) {
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switch (data->num_cores) {
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case 1: break;
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case 2: code = CORE_DUO; break;
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case 4: code = KENTSFIELD; break;
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case 2:
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{
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code = CORE_DUO;
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if (data->num_logical_cpus > 2)
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code = DUAL_CORE_HT;
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break;
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}
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case 4:
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{
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code = QUAD_CORE;
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if (data->num_logical_cpus > 4)
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code = QUAD_CORE_HT;
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break;
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}
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default:
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code = MORE_THAN_QUADCORE; break;
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}
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}
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if (code == CORE_DUO && data->l2_cache == 2048)
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code = ALLENDALE;
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const struct { int cache_size; intel_code_t code; }
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match_cache[] = {
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{ 512, CORE_DUO_512K },
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{ 1024, CORE_DUO_1024K },
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{ 2048, ALLENDALE },
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{ 3072, PENRYN },
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{ 6144, WOLFDALE },
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};
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if (code == CORE_DUO && data->l2_cache != 4096) {
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for (i = 0; i < COUNT_OF(match_cache); i++) {
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if (match_cache[i].cache_size == data->l2_cache) {
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code = match_cache[i].code;
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break;
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}
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}
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}
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match_cpu_codename(cpudb_intel, COUNT_OF(cpudb_intel), data, code);
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}
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