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Fix issue with HyperThreading status in old cpus
Early P4 processors come with the HT flag, but that feature is not enabled. This makes it work the way it should.
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parent
fa9640b3a2
commit
f26c1151f0
3 changed files with 7 additions and 5 deletions
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@ -612,7 +612,9 @@ static void decode_intel_number_of_cores(struct cpu_raw_data_t* raw,
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data->num_logical_cpus = logical_cpus;
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data->num_logical_cpus = logical_cpus;
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} else {
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} else {
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data->num_cores = 1;
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data->num_cores = 1;
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data->num_logical_cpus = (logical_cpus >= 2 ? logical_cpus : 2);
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data->num_logical_cpus = (logical_cpus >= 1 ? logical_cpus : 1);
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if (data->num_logical_cpus == 1)
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data->flags[CPU_FEATURE_HT] = 0;
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}
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}
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} else {
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} else {
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data->num_cores = data->num_logical_cpus = 1;
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data->num_cores = data->num_logical_cpus = 1;
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@ -73,7 +73,7 @@ intel_fn4[3]=00000000 00000000 00000000 00000000
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15
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15
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3
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3
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1
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1
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1
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16
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16
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-1
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-1
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256
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256
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@ -86,4 +86,4 @@ intel_fn4[3]=00000000 00000000 00000000 00000000
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-1
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-1
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64 (non-authoritative)
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64 (non-authoritative)
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P-4 Celeron D (Prescott-256)
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P-4 Celeron D (Prescott-256)
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni dts64 monitor ds_cpl cid xtpr
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss tm pbe pni dts64 monitor ds_cpl cid xtpr
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@ -73,7 +73,7 @@ intel_fn4[3]=665b5101 00000000 00000000 007b7040
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15
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2
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1
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1
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2
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1
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8
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12
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512
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512
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@ -86,4 +86,4 @@ intel_fn4[3]=665b5101 00000000 00000000 007b7040
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-1
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-1
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64 (non-authoritative)
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64 (non-authoritative)
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Mobile P-4 (Northwood)
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Mobile P-4 (Northwood)
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fpu vme de pse tsc msr pae mce cx8 mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe cid xtpr
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fpu vme de pse tsc msr pae mce cx8 mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss tm pbe cid xtpr
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