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Author SHA1 Message Date
Xorg
2b8023f733
Support for hybrid CPU (#166)
* Set CMAKE_C_FLAGS_DEBUG to display warnings during build

CI workflows are reporting warnings. Adding more C flags here help to avoid that.

* Add new types

* Add set_cpu_affinity function

* Add cpu_identify_all function

* Add cpu_request_core_type function

* Add cpuid_get_all_raw_data, cpuid_serialize_all_raw_data and cpuid_deserialize_all_raw_data functions

* Detect hybrid architecture for Intel CPUs

* Update cpuid_tool to detect all CPU logical cores

* Rename tests subdirectories for Intel Core

* Update all tests

Since e4309a6c4bc3ad875711a1599cba01a205b3103e, new fields are reported by cpuid_tool

* Add Intel Alder Lake

Fix #157

* Remove convert_instlatx64.c

This tool is not useful anymore because the cpuid_deserialize_raw_data_internal() function can natively parse them since 5667e1401c

* Fix affinity_mask computation

* Define _GNU_SOURCE in configure.ac

Forgotten in 4f80964db5

* Use dynamic raw array in cpu_raw_data_array_t

* Add cpu_affinity_mask_t type

* Improve set_cpu_affinity function

- Print a warning if logical CPU number is not supported on operating system
- Return a boolean value in case of success instead of an integer

* Improve cpu_identify_all and cpu_request_core_type functions

* Use dynamic array for cpu_types in system_id_t

This commit also adds cleanups, fixes and consistency

* Tests: update Ryzen 5 Matisse with all CPU cores

* Add affinity_mask_str_r function and address other comments

- Fixed cpuid_grow_raw_data_array and cpu_raw_data_array_t.logical_cpu_t with the correct type
- Added a note about hard limit of cpu_raw_data_array_t
- Fixed a typo in cpuid_deserialize_raw_data_internal

* Fix build on Windows
2022-09-15 18:37:08 +02:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Veselin Georgiev
45d04a9e4a Fix P-III Celeron misdetected as plain P-III (misreport id #8)
Reported via http://libcpuid.sourceforge.net/bugreport.php
The test in particular has no brand string, which was causing the
misdetection (as is the case with a lot of other models, libcpuid
relies on accurate brand string being programmed by the BIOS in
order to do the detection).

The actual CPU was a Pentium-III based Celeron (SL54Q), but it
was detected as "Pentium III (Coppermine)".

A bit of historical trivia: for the related Tualatin models, if
the BIOS doesn't enter a brand string, there might be NO WAY to
tell a regular P-3 and a P-3 Celeron apart: P-3s have variants
with 256KiB and 512KiB L2 cache, while the Celerons are 256 KiB, so
a 256KiB regular P3 is no different than its corresponding Celeron.
Only the FSB is different, but there's no way to detect this via
CPUID.

For the Coppermines its an easier case: Celerons are always 128KiB,
and Pentia are 256KiB, so I've added this distinction in the tables.
2018-05-02 11:05:25 +03:00
Veselin Georgiev
f52c02d394 Update all tests: add fields for L4 cache size, assoc. and line size. 2016-07-07 00:44:45 +03:00
Veselin Georgiev
019170b65f Refactor the tests: put each test case in a separate file
Instead of one big pile of tests in tests_stash.txt, keep each CPU
example raw data/parsed data in a file, ordered in a tree by
manufacturer and microarchitecture. The 64 .test files have been
extracted from tests_stash.txt. The add_test script is changed to
create_test and it doesn't append to test_stash.txt, instead it
spits out data to be saved in a .test file.

run_tests.py is not refactored yet, to be done in a subsequent commit.
2014-07-15 19:59:35 +03:00