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Author SHA1 Message Date
Xorg
672720c501
DB: add Comet Lake-U 
https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power)
Reported in X0rg/CPU-X#162
 2020-11-14 13:45:14 +01:00
Xorg
4846161cfc
DB: add Kaby Lake-G 
https://en.wikichip.org/wiki/intel/cores/kaby_lake_g
Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt
 2020-11-14 13:45:14 +01:00
Xorg
77dfe98a4c
DB: add Kaby Lake Refresh 
https://en.wikichip.org/wiki/intel/cores/kaby_lake_r
Core i5 8250U was detected as Coffee Lake wrongly.
Reported in X0rg/CPU-X#161
 2020-11-14 13:45:14 +01:00
Veselin Georgiev
92475d76ac Fixes issue #148: CMake build script not in 0.5.0 tarball release 2020-10-19 02:12:03 +03:00
Veselin Georgiev
52c5f505cf Related to c2645d0. Convert all python scripts to Python 3. 
As stated in discussion, Python 2 is actively being deprecated
and the fix is easy, almost automatic.
 2020-05-28 19:57:30 +03:00
Xorg
0419610804
Add Downloads section on Readme.md 
Close #140
 2020-05-27 20:49:45 +02:00
Xorg
781981ef3c
Add I-Nex to the users list 2020-05-27 20:00:22 +02:00
Xorg
5da90c9dcc
CI: remove 'v' prefix in assets 2020-05-26 09:17:00 +02:00
Xorg
b8f6dea265
CI: checkout sources before making release 2020-05-26 09:02:48 +02:00
Xorg
2343193401
Release version 0.5.0 (#146) 
* Set version to 0.5.0

* Update debian/control to the new version (incompatible with 0.4.x)

* Rename .install files to match SO version

Co-authored-by: Veselin Georgiev <anrieff@gmail.com>
 2020-05-25 23:33:26 +03:00
Xorg
dfc8b2fdbd
Add GitHub workflows for CI/CD 
- CI: it will check code consistency and run tests for all events (except for tags)
- CD: it will build all assets and create a draft
Close #122
 2020-05-23 19:13:01 +02:00
Xorg
8f65066dcc
check-consistency: return error count 2020-05-23 18:30:59 +02:00
Xorg
9abab57bdc
Fix code consistency 
Result before this patch:

Checking enum `cpu_feature_t': 113 elements; max size (CPU_FLAGS_MAX=128)... OK
Checking enum `cpu_hint_t': 1 elements; max size (CPU_HINTS_MAX=16)... OK
Checking enum `cpu_sgx_feature_t': 2 elements; max size (SGX_FLAGS_MAX=14)... OK
Finding features:
..Mismatch - cpuid_main.c:688 - `AVX512VNNI' vs `avx512_vnni'
..Mismatch - cpuid_main.c:689 - `AVX512VBMI' vs `avx512_vbmi'
..Mismatch - cpuid_main.c:690 - `AVX512VBMI2' vs `avx512_vbmi2'
  cpuid_main.c: 113 features described
Found 113 total features and 113 named features
Checking whether all features have detection code... FAILED:
..No detection code for CPU_FEATURE_SSE5
 2020-05-23 18:24:30 +02:00
Xorg
ac5702b06b
CMake: fix include directory 2020-05-23 09:47:37 +02:00
Xorg
7c7fd3b565
CMake: fix build on Windows 2020-05-22 22:06:34 +02:00
Xorg
c129bc23a4
CMake: fix install target's export 2020-05-21 22:10:23 +02:00
Xorg
1a00dac1ee
tests: fix unused-result warning in convert_instlatx64 tool 2020-05-21 19:00:26 +02:00
Xorg
b4560fc740
Update .gitignore 2020-05-21 18:44:12 +02:00
Xorg
7179a7b103
CMake: fix Unix install and format 2020-05-21 18:43:34 +02:00
Xorg
f49e82043c
Add config file for cmake-format 
It formats CMakeLists.txt files
See https://github.com/cheshirekow/cmake_format
 2020-05-21 18:42:42 +02:00
Xorg
74bb73c578
Doxygen: upgrade Doxyfile to avoid warnings 
warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete.
To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value
Using the default: a4!
 2020-05-21 17:20:06 +02:00
Xorg
7de9d87ff2
Doxygen: turn on quiet mode 
It is too noisy with CMake
 2020-05-21 17:15:39 +02:00
Xorg
180154f03d
Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs 
More information: https://en.wikichip.org/wiki/x86/avx-512
Resolve #134
 2020-05-18 22:05:01 +02:00
Xorg
4b06a9a23e
Detect ABM feature on Intel CPUs 
Resolve #144
 2020-05-18 21:11:01 +02:00
Xorg
9419c573ca
Detect RDSEED/ADX/SHA_NI features on AMD CPUs 
These x86 instruction set extensions are present since Zen micro-architecture
Resolve #145
 2020-05-18 21:05:20 +02:00
Veselin Georgiev
8db3b8d2d3
Merge pull request #142 from ClickHouse-Extras/fix-tsan 
Fix TSan report
 2020-05-11 09:10:48 +03:00
alexey-milovidov
a9fe7b6aca
Update cpuid_main.c 2020-05-11 00:26:23 +03:00
Xorg
ef8986407f DB: add Ivy Bridge-E (Xeon) 2020-05-10 17:02:45 +00:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Xorg
e592a83278 Tests: update to add L1I information 
Related to 25d0614811
Dump of Core i5 520m from CPU-X#119
 2020-05-10 17:02:45 +00:00
Xorg
25d0614811
Add L1 Instruction Cache information 
Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119
It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t
To avoid confusing, also adds l1_data_assoc and l1_data_cacheline
l1_assoc and l1_cacheline are leave untouched for backward compatibility
 2020-05-10 11:49:02 +02:00
Xorg
21e4b1f48e
Ignore .vscode directory 
Yes, 0b05f45e03 was about VS Code
 2020-05-09 22:50:16 +02:00
Xorg
6b5a1f5ea6
Tests: add amd_fn8000001dh subleaf 
See e562798cec
 2020-05-09 22:48:07 +02:00
Xorg
3a346d4d72
Tests: parse subleafs in convert_instlatx64 
Also, it adds 0xffffffff when data is not available, so all lines are presents
 2020-05-09 22:46:13 +02:00
Xorg
e562798cec
Re-fix L3 cache associativity detection on AMD Zen 2 CPUs 
Previous commit: 848394ee46
 2020-05-09 22:39:42 +02:00
Alexey Milovidov
6f8449d88e Applied a patch from @tavplubix 2020-05-09 21:07:16 +03:00
Xorg
b23145144f
Use constant for registers name 
It helps when reading technical documentation and it avoids 'magic values'
 2020-05-09 18:17:50 +02:00
Xorg
0b05f45e03
Remove all trailling spaces 
It is annoying with some text editors
 2020-05-09 17:34:07 +02:00
Xorg
d317e1504f
DB: fix Rome extended model 2020-05-09 15:59:28 +02:00
Xorg
c854176478
DB: add Renoir APUs 2020-05-09 15:57:56 +02:00
Xorg
8720a71b35
Tests: add Core i5 8250U 
Related to X0rg/CPU-X#129
 2020-05-09 14:46:59 +02:00
Xorg
edee5aba6f
DB: add Ice Lake CPUs 2020-05-09 14:46:48 +02:00
Xorg
b0f615527f
DB: add Comet Lake CPUs 2020-05-09 14:32:56 +02:00
Xorg
20100f3faf
DB: add Coffee Lake Refresh 
It differs from Coffee Lake by stepping
Core i5 9400 and 9500 will still be detected as Coffee Lake because it only differs by revision...
 2020-05-09 14:08:12 +02:00
Xorg
eda4204787
DB: add Coffee Lake-U 
It differs from Kaby Lake-U by stepping
 2020-05-09 13:46:50 +02:00
Xorg
faf958c3c9
DB: add Cannon Lake CPUs 2020-05-09 13:28:11 +02:00
Xorg
af5019acec
DB: clarify Intel Generations 2020-05-09 13:02:26 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master 
Fixes for AMD Zen 2 CPUs
 2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part 2020-05-03 17:12:33 +02:00
Xorg
afbd7ae56d
tests: fix convert_instlatx64 tool 2020-05-03 17:09:54 +02:00