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459 commits 1 branch 15 tags 5.3 MiB
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7 commits

Author SHA1 Message Date
Veselin Georgiev
f6e4e23796 Add Xeon CLX (Cascade lake-based) using data from PR #129 
Kudos to Leslie-Fang for providing it!
 2019-08-09 11:18:20 +03:00
Xorg
218015a983 Tests: Add Pentium 4405U 2018-08-08 15:02:08 +02:00
Xorg
9c382e33b3 DB: Add Skylake-X CPUs 2018-08-08 14:51:38 +02:00
Veselin Georgiev
2f4c21e3a7 Fixed issue #103: Intel Xeon Scalable not recognised "code name". 
Table entry added, test added, thanks to @phprus for reporting.
 2018-01-28 02:06:37 +02:00
Veselin Georgiev
e36a08deb9 Fixed issue #76: Skylake Core i5 badly recognized 
Add support for detecting RDSEED and ADX instructions.
Use RDSEED instead of RTM to ascertain that the CPU is
Broadwell or later in recog_intel.c. This fixes
detection discrepancies on Linux, where RTM is not
made available (I guess there's no kernel support for it).

The two new flags are also now detected in the Broadwell
and Skylake tests. Update them as well.
 2016-10-25 05:16:44 +03:00
Veselin Georgiev
f52c02d394 Update all tests: add fields for L4 cache size, assoc. and line size. 2016-07-07 00:44:45 +03:00
Veselin Georgiev
7b9fe29cef Support for Skylake. 
- Detection of hle, rtm, avx512* and sha-ni instructions
- Detection for Skylake
- Add test with Skylake i5
 2016-05-19 01:37:45 +03:00