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220 commits

Author SHA1 Message Date
Veselin Georgiev
d520a37569 Support for Core i5/i3. The matchtables now have a column for L3 cache
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@87 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2010-10-13 09:18:07 +00:00
Veselin Georgiev
3578314b9b Added support for Athlon II Propus
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@67 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-24 20:39:04 +00:00
Veselin Georgiev
831962cb07 Fix for a few badly detected Yonahs. They read as Unknown Yonah. Added a test-case as well
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@65 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-10 03:44:19 +00:00
Veselin Georgiev
a8e1da64d3 Fixed a typo for Athlon X2 (Kuma) and added such an entry to the test stash
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@64 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-10 03:29:06 +00:00
Veselin Georgiev
7251690507 Fixed a regression. Core2 Quad (Q66xx series) incorrectly recognized as a Xeon
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@63 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-10 03:01:31 +00:00
Veselin Georgiev
69312e9741 Cleared problems with the Phenom/PhenomII line. Now PhenomIIs are recognized as such. Also, Sempron and Athlon II branded derivates of the Phenom line are properly recognized
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@62 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-10 01:28:33 +00:00
Veselin Georgiev
decdd2e001 Added detection for Xeon (Gainestown) and Conroe-L (Celeron). Dual-core Conroe-L's are renamed to Conroe-L (Allendale).
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@61 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-09-10 01:04:10 +00:00
Veselin Georgiev
103bb027c6 Support for Nehalem Xeons added
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@60 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-08-26 03:57:14 +00:00
Veselin Georgiev
59cf96984d Fixed recognition of Core i7. It was required to obtain the extended CPU topology information from CPUID leaf 0xb, so 4 more ints are added to cpu_raw_data_t. This, in turn, breaks binary compatibility with version 0.1.0, so version is increased to 0.1.1 as well. The new CPUID serialization is backward- and forward-compatible with version 0.1.0, provided that the CPU doesn't have leaf 0xb. In some sense it might be viewed incompatible as well. Also added the guilty test case to the test stash
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@57 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-07-06 18:33:56 +00:00
Veselin Georgiev
b20d0254de Added the unit tests to the tarball distribution
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@51 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-01-13 18:33:28 +00:00
Veselin Georgiev
690c4e431b Fixed the detection on Mac Mini with Yonah/Core Duo CPU - was incorrectly recognized as Allendale
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@49 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2009-01-08 17:37:58 +00:00
Veselin Georgiev
9b38de1383 Added cache sizes to Phenom code-names, added the newest Phenoms (family 0x10, model 0x4), added Mobile Pentium II Tonga
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@43 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-15 15:08:42 +00:00
Veselin Georgiev
aca3658e42 Small additions to consistency-checking code
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@42 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-15 14:54:39 +00:00
Veselin Georgiev
32425d7937 Adding correct recognition for Mobile Sempron 64s, added some additional sanity checking in check-consistency
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@41 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-15 14:11:46 +00:00
Veselin Georgiev
f986629b65 Reorganization of CPU databases, added correct recognition of most Core-based Xeons, fixed a few other misrecognitions
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@40 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-12 18:56:29 +00:00
Veselin Georgiev
e3d6f1b6ea Fixed a lot of bugs in codename recognition of intel CPUs
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@39 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-10 16:50:43 +00:00
Veselin Georgiev
a1395632fa Fixed many bugreports. Correct recognition for some Core2 Xeons, some ConroeLs, Sempron Codenames, some A64 and A64X2 codenames.
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@36 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-08 16:52:01 +00:00
Veselin Georgiev
da2eb29639 Fixed detection of Merom and other mobile Core2 arch
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@34 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-12-04 00:00:21 +00:00
Veselin Georgiev
abda939d02 Two more CPUs
git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@32 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-11-21 19:54:18 +00:00
Veselin Georgiev
7774c94046 libcpuid: better support for Core 2 processors: Wolfdale, Penryn, Merom - more robust detection code
cpuid_tool: the --load flag didn't have any effect with queries; fixed
tests: added a trivial testing framework, added 7 tests

git-svn-id: https://svn.code.sf.net/p/libcpuid/code/HEAD/libcpuid@28 3b4be424-7ac5-41d7-8526-f4ddcb85d872
2008-11-21 16:45:46 +00:00