Reported via http://libcpuid.sourceforge.net/bugreport.php
The test in particular has no brand string, which was causing the
misdetection (as is the case with a lot of other models, libcpuid
relies on accurate brand string being programmed by the BIOS in
order to do the detection).
The actual CPU was a Pentium-III based Celeron (SL54Q), but it
was detected as "Pentium III (Coppermine)".
A bit of historical trivia: for the related Tualatin models, if
the BIOS doesn't enter a brand string, there might be NO WAY to
tell a regular P-3 and a P-3 Celeron apart: P-3s have variants
with 256KiB and 512KiB L2 cache, while the Celerons are 256 KiB, so
a 256KiB regular P3 is no different than its corresponding Celeron.
Only the FSB is different, but there's no way to detect this via
CPUID.
For the Coppermines its an easier case: Celerons are always 128KiB,
and Pentia are 256KiB, so I've added this distinction in the tables.
Add support for detecting Coffee Lake i[357]s. Test included.
Thanks to @X0rg for reporting and to @exdeus for the raw cpu data.
The detection here relies on Kaby and Coffee lakes having different
number of cores for the equivalent brand:
i3: 2 cores in Kaby, 4 in Coffee
i5 and i7: 4 cores in Kaby, 6 in Coffee.
Add support for detecting RDSEED and ADX instructions.
Use RDSEED instead of RTM to ascertain that the CPU is
Broadwell or later in recog_intel.c. This fixes
detection discrepancies on Linux, where RTM is not
made available (I guess there's no kernel support for it).
The two new flags are also now detected in the Broadwell
and Skylake tests. Update them as well.
Improved parsing of brand strings for both Pineview and Cedarview
Atoms.
Add tests for both the Pineview Atom, and also Broadwell-E
(forgotten in a previous commit).
The test is a snapshot of a Haswell i7 (a.k.a. "Crystalwell") core.
This is the only test in the test DB right now which has lines for
L4 cache size, associativity and cacheline size different than "-1".
Also update create_test.py to accommodate for the new fields.
According to wikipedia, cpu-world and some cpu-z screenshots, these processors
do have a code name and it's willamette, northwood, prescott or cedar mill
Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
Priously all fields in the matchtable were treated equal in importance.
With this change, the cache size a taken with half the weight in the decision.
Also add detection entries for some more recent Haswells, and the respective
tests. These are an i5 Haswell from a Mac Book Pro, and a i7 Haswel from
Thinkpad T540.
- Detect AVX and AVX2 on both Intel and AMD CPUs
- Detect BMI1 and BMI2 instruction sets (BMI2 is only on Haswell, BMI1 is
also present on Bulldozers).
- Fix tests to reflect changes.
- Atom Dual-core (Diamondville) is renamed to just Atom (Diamondville)
- The test with Atom D425 is named "Pineview", while the one with
Atom D525 was incorrectly named "Cedarview". Moving the latter to
atom-pineview-2.test and fixing its codename.
Instead of one big pile of tests in tests_stash.txt, keep each CPU
example raw data/parsed data in a file, ordered in a tree by
manufacturer and microarchitecture. The 64 .test files have been
extracted from tests_stash.txt. The add_test script is changed to
create_test and it doesn't append to test_stash.txt, instead it
spits out data to be saved in a .test file.
run_tests.py is not refactored yet, to be done in a subsequent commit.
