Xorg 0c9ef3249c Decode deterministic cache info for AMD CPUs too ... Since Zen-based CPUs, cpu_id_t::l3_cache is the size of the total L3 cache for the whole chip, while cpu_id_t::l1_cache and cpu_id_t::l2_cache are size for each instances. This change provide L3 cache size per instance.		2022-09-22 17:49:38 +02:00
..
epyc-milan.test	Decode deterministic cache info for AMD CPUs too	2022-09-22 17:49:38 +02:00
ryzen7-cezanne.test	Support for hybrid CPU (#166)	2022-09-15 18:37:08 +02:00
ryzen7-rembrandt.test	Support for hybrid CPU (#166)	2022-09-15 18:37:08 +02:00
ryzen9-cezanne.test	Support for hybrid CPU (#166)	2022-09-15 18:37:08 +02:00
ryzen9-rembrandt.test	Support for hybrid CPU (#166)	2022-09-15 18:37:08 +02:00
ryzen9-vermeer.test	Decode deterministic cache info for AMD CPUs too	2022-09-22 17:49:38 +02:00