Veselin Georgiev 86bf8e8269 Fixed issue #81: Misdiagnosis microarchitecture for i3-3220T ... It's a mystery to me why this CPU doesn't have RdRand. A quick-n-dirty workaround is inserted to fix that.		2017-02-10 03:48:00 +02:00
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amd	Update all tests: add fields for L4 cache size, assoc. and line size.	2016-07-07 00:44:45 +03:00
intel	Fixed issue #81: Misdiagnosis microarchitecture for i3-3220T	2017-02-10 03:48:00 +02:00
create_test.py	Add a test with L4 cache (courtesy of @phprus).	2016-07-07 00:53:03 +03:00
Makefile.am	When creating a tarball, include the small tests now instead of tests_stash.txt	2014-07-16 10:29:58 +03:00
run_tests.py	Update all tests: add fields for L4 cache size, assoc. and line size.	2016-07-07 00:44:45 +03:00