2020-03-17 04:31:30 +00:00
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.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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2020-05-26 22:09:00 +00:00
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.set gp=64 # allow use of 64-bit general purpose registers
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2020-03-17 04:31:30 +00:00
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.section .text
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2020-05-26 22:09:00 +00:00
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.balign 16
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2020-03-17 04:31:30 +00:00
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glabel osWritebackDCache
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/* 0052C0 800046C0 18A00011 */ blez $a1, .L80004708
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/* 0052C4 800046C4 00000000 */ nop
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/* 0052C8 800046C8 240B2000 */ li $t3, 8192
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/* 0052CC 800046CC 00AB082B */ sltu $at, $a1, $t3
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/* 0052D0 800046D0 1020000F */ beqz $at, .L80004710
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/* 0052D4 800046D4 00000000 */ nop
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/* 0052D8 800046D8 00804025 */ move $t0, $a0
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/* 0052DC 800046DC 00854821 */ addu $t1, $a0, $a1
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/* 0052E0 800046E0 0109082B */ sltu $at, $t0, $t1
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/* 0052E4 800046E4 10200008 */ beqz $at, .L80004708
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/* 0052E8 800046E8 00000000 */ nop
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/* 0052EC 800046EC 310A000F */ andi $t2, $t0, 0xf
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/* 0052F0 800046F0 2529FFF0 */ addiu $t1, $t1, -0x10
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/* 0052F4 800046F4 010A4023 */ subu $t0, $t0, $t2
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.L800046F8:
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/* 0052F8 800046F8 BD190000 */ cache 0x19, ($t0)
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/* 0052FC 800046FC 0109082B */ sltu $at, $t0, $t1
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/* 005300 80004700 1420FFFD */ bnez $at, .L800046F8
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/* 005304 80004704 25080010 */ addiu $t0, $t0, 0x10
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.L80004708:
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/* 005308 80004708 03E00008 */ jr $ra
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/* 00530C 8000470C 00000000 */ nop
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.L80004710:
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/* 005310 80004710 3C088000 */ lui $t0, %hi(D_80000010) # $t0, 0x8000
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/* 005314 80004714 010B4821 */ addu $t1, $t0, $t3
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/* 005318 80004718 2529FFF0 */ addiu $t1, $t1, -0x10
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.L8000471C:
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/* 00531C 8000471C BD010000 */ cache 1, ($t0)
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/* 005320 80004720 0109082B */ sltu $at, $t0, $t1
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/* 005324 80004724 1420FFFD */ bnez $at, .L8000471C
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/* 005328 80004728 25080010 */ addiu $t0, %lo(D_80000010) # addiu $t0, $t0, 0x10
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/* 00532C 8000472C 03E00008 */ jr $ra
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/* 005330 80004730 00000000 */ nop
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