2020-03-17 04:31:30 +00:00
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#include <ultra64.h>
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#include <global.h>
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#include <ultra64/controller.h>
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pif_data_buffer_t osPifBuffers[4];
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2020-03-22 21:19:43 +00:00
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// func_800CF990 in 1.0
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2020-04-14 17:17:25 +00:00
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s32 osSetRumble(unk_controller_t* arg0, u32 vibrate) {
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2020-03-17 04:31:30 +00:00
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s32 i;
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s32 ret;
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2020-03-22 21:19:43 +00:00
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u8* buf;
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2020-03-17 04:31:30 +00:00
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buf = (u8*)&osPifBuffers[arg0->ctrlridx];
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2020-03-22 21:19:43 +00:00
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if (!(arg0->unk0 & 8)) {
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2020-03-17 04:31:30 +00:00
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return 5;
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}
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__osSiGetAccess();
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osPifBuffers[arg0->ctrlridx].status_control = 1;
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buf += arg0->ctrlridx;
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2020-03-22 21:19:43 +00:00
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for (i = 0; i < 0x20; i++) {
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((PIF_mempak_wr_t*)buf)->data[i + 2] = vibrate;
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2020-03-17 04:31:30 +00:00
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}
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2020-03-22 21:19:43 +00:00
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2020-04-14 17:17:25 +00:00
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_osCont_lastPollType = 0xfe; // last controller poll type?
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2020-03-17 04:31:30 +00:00
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__osSiRawStartDma(OS_WRITE, &osPifBuffers[arg0->ctrlridx]);
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osRecvMesg(arg0->ctrlrqueue, NULL, OS_MESG_BLOCK);
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__osSiRawStartDma(OS_READ, &osPifBuffers[arg0->ctrlridx]);
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osRecvMesg(arg0->ctrlrqueue, NULL, OS_MESG_BLOCK);
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ret = ((PIF_mempak_wr_t*)buf)->hdr.status_hi_bytes_rec_lo & 0xc0;
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if (!ret) {
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if (!vibrate) {
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2020-03-22 21:19:43 +00:00
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if (((PIF_mempak_wr_t*)buf)->data[0x22] != 0) {
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2020-03-17 04:31:30 +00:00
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ret = 4;
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}
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2020-03-22 21:19:43 +00:00
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} else {
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if (((PIF_mempak_wr_t*)buf)->data[0x22] != 0xeb) {
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2020-03-17 04:31:30 +00:00
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ret = 4;
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}
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}
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}
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__osSiRelAccess();
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return ret;
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}
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2020-03-22 21:19:43 +00:00
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void osSetUpMempakWrite(s32 ctrlridx, pif_data_buffer_t* buf) {
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2020-03-17 04:31:30 +00:00
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u8* buf_ptr = (u8*)buf;
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PIF_mempak_wr_t mempakwr;
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s32 i;
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mempakwr.hdr.slot_type = 0xFF;
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mempakwr.hdr.bytes_send = 0x23;
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mempakwr.hdr.status_hi_bytes_rec_lo = 1;
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2020-03-22 21:19:43 +00:00
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mempakwr.hdr.command = 3; // write mempak
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2020-04-14 17:17:25 +00:00
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mempakwr.data[0] = 0x600 >> 3;
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mempakwr.data[1] = (u8)(osMempakAddrCRC(0x600) | (0x600 << 5));
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2020-03-22 21:19:43 +00:00
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if (ctrlridx != 0) {
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for (i = 0; i < ctrlridx; ++i) {
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2020-03-17 04:31:30 +00:00
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*buf_ptr++ = 0;
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}
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}
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*(PIF_mempak_wr_t*)buf_ptr = mempakwr;
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buf_ptr += 0x27;
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*buf_ptr = 0xFE;
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}
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typedef struct {
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u8 unk[0x20];
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} unk_sp24_t;
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2020-04-14 17:17:25 +00:00
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s32 osProbeRumblePak(OSMesgQueue* ctrlrqueue, unk_controller_t* unk_controller, u32 ctrlridx) {
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2020-03-17 04:31:30 +00:00
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s32 ret;
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unk_sp24_t sp24;
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2020-03-22 21:19:43 +00:00
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2020-03-17 04:31:30 +00:00
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unk_controller->ctrlrqueue = ctrlrqueue;
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unk_controller->ctrlridx = ctrlridx;
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2020-04-14 17:17:25 +00:00
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unk_controller->bytes[0x65] = 0xff;
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2020-03-17 04:31:30 +00:00
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unk_controller->unk0 = 0;
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2020-03-22 21:19:43 +00:00
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2020-03-17 04:31:30 +00:00
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ret = func_80104C80(unk_controller, 0xfe);
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2020-03-22 21:19:43 +00:00
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if (ret == 2) {
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2020-03-17 04:31:30 +00:00
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ret = func_80104C80(unk_controller, 0x80);
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}
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2020-03-22 21:19:43 +00:00
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if (ret != 0) {
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2020-03-17 04:31:30 +00:00
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return ret;
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}
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2020-04-14 17:17:25 +00:00
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ret = osReadMempak(ctrlrqueue, ctrlridx, 0x400, &sp24);
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2020-03-17 04:31:30 +00:00
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ret = ret;
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2020-03-22 21:19:43 +00:00
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if (ret == 2) {
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2020-04-14 17:17:25 +00:00
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ret = 4; // "Controller pack communication error"
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2020-03-17 04:31:30 +00:00
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}
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2020-03-22 21:19:43 +00:00
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if (ret != 0) {
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2020-03-17 04:31:30 +00:00
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return ret;
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}
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2020-03-22 21:19:43 +00:00
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if (sp24.unk[0x1F] == 0xfe) {
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2020-04-14 17:17:25 +00:00
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return 0xb; // possibly controller pack? (Some other valid return value other than rumble pak)
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2020-03-17 04:31:30 +00:00
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}
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ret = func_80104C80(unk_controller, 0x80);
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2020-03-22 21:19:43 +00:00
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if (ret == 2) {
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2020-04-14 17:17:25 +00:00
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ret = 4; // "Controller pack communication error"
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2020-03-17 04:31:30 +00:00
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}
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2020-03-22 21:19:43 +00:00
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if (ret != 0) {
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2020-03-17 04:31:30 +00:00
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return ret;
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}
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2020-04-14 17:17:25 +00:00
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ret = osReadMempak(ctrlrqueue, ctrlridx, 0x400, &sp24);
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2020-03-22 21:19:43 +00:00
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if (ret == 2) {
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2020-04-14 17:17:25 +00:00
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ret = 4; // "Controller pack communication error"
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2020-03-17 04:31:30 +00:00
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}
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2020-03-22 21:19:43 +00:00
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if (ret != 0) {
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2020-03-17 04:31:30 +00:00
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return ret;
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}
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2020-03-22 21:19:43 +00:00
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if (sp24.unk[0x1F] != 0x80) {
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2020-04-14 17:17:25 +00:00
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return 0xb; // possibly controller pack? (Some other valid return value other than rumble pak)
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2020-03-17 04:31:30 +00:00
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}
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2020-03-22 21:19:43 +00:00
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if ((unk_controller->unk0 & 8) == 0) {
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2020-03-17 04:31:30 +00:00
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osSetUpMempakWrite(ctrlridx, &osPifBuffers[ctrlridx]);
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}
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unk_controller->unk0 = 8;
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2020-04-14 17:17:25 +00:00
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return 0; // "Recognized rumble pak"
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2020-03-17 04:31:30 +00:00
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}
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