2020-10-28 19:59:18 +00:00
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.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.section .text
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.balign 16
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glabel guMtxL2F
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2020-03-17 04:31:30 +00:00
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/* B7A140 80102FA0 3C013780 */ li $at, 0x37800000 # 0.000000
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/* B7A144 80102FA4 44810000 */ mtc1 $at, $f0
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/* B7A148 80102FA8 3C19FFFF */ li $t9, 0xFFFF0000 # 0.000000
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/* B7A14C 80102FAC 24B80020 */ addiu $t8, $a1, 0x20
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.L80102FB0:
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/* B7A150 80102FB0 8CA80000 */ lw $t0, ($a1)
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/* B7A154 80102FB4 8CA90020 */ lw $t1, 0x20($a1)
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/* B7A158 80102FB8 24A50004 */ addiu $a1, $a1, 4
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/* B7A15C 80102FBC 01195024 */ and $t2, $t0, $t9
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/* B7A160 80102FC0 00095C02 */ srl $t3, $t1, 0x10
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/* B7A164 80102FC4 014B6025 */ or $t4, $t2, $t3
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/* B7A168 80102FC8 448C2000 */ mtc1 $t4, $f4
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/* B7A16C 80102FCC 00086C00 */ sll $t5, $t0, 0x10
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/* B7A170 80102FD0 312EFFFF */ andi $t6, $t1, 0xffff
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/* B7A174 80102FD4 01AE7825 */ or $t7, $t5, $t6
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/* B7A178 80102FD8 468021A0 */ cvt.s.w $f6, $f4
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/* B7A17C 80102FDC 448F5000 */ mtc1 $t7, $f10
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/* B7A180 80102FE0 24840008 */ addiu $a0, $a0, 8
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/* B7A184 80102FE4 46805420 */ cvt.s.w $f16, $f10
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/* B7A188 80102FE8 46003202 */ mul.s $f8, $f6, $f0
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/* B7A18C 80102FEC 00000000 */ nop
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/* B7A190 80102FF0 46008482 */ mul.s $f18, $f16, $f0
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/* B7A194 80102FF4 E488FFF8 */ swc1 $f8, -8($a0)
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/* B7A198 80102FF8 14B8FFED */ bne $a1, $t8, .L80102FB0
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/* B7A19C 80102FFC E492FFFC */ swc1 $f18, -4($a0)
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/* B7A1A0 80103000 03E00008 */ jr $ra
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2020-10-28 19:59:18 +00:00
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/* B7A1A4 80103004 00000000 */ nop
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