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[ntsc-1.2] LoadFragment2 OK (#2118)
* [ntsc-1.2] LoadFragment2 OK * Add insight about bssSize
This commit is contained in:
Derek Hensley
GitHub
parent
2152d1df2d
commit
3e200769f1
8 changed files with 231 additions and 15 deletions
7
Makefile
7
Makefile
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@ -431,13 +431,14 @@ $(BUILD_DIR)/src/code/rand.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/gfxprint.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/jpegutils.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/jpegdecoder.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/load.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/loadfragment2.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/loadfragment2_n64.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/load_gc.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/loadfragment2_gc.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/mtxuty-cvt.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/padsetup.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/padutils.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/printutils.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/relocation.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/relocation_gc.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/sleep.o: OPTFLAGS := -O2
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$(BUILD_DIR)/src/code/system_malloc.o: OPTFLAGS := -O2
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14
spec
14
spec
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@ -562,15 +562,21 @@ beginseg
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include "$(BUILD_DIR)/src/audio/sequence.o"
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include "$(BUILD_DIR)/src/audio/data.o"
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include "$(BUILD_DIR)/src/audio/session_config.o"
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include "$(BUILD_DIR)/src/code/logseverity.o"
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#if !PLATFORM_N64
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include "$(BUILD_DIR)/src/code/logseverity_gc.o"
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#endif
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include "$(BUILD_DIR)/src/code/gfxprint.o"
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include "$(BUILD_DIR)/src/code/rcp_utils.o"
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include "$(BUILD_DIR)/src/code/loadfragment2.o"
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#if PLATFORM_N64
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include "$(BUILD_DIR)/src/code/loadfragment2_n64.o"
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#else
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include "$(BUILD_DIR)/src/code/loadfragment2_gc.o"
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#if OOT_DEBUG
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include "$(BUILD_DIR)/src/code/mtxuty-cvt.o"
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#endif
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include "$(BUILD_DIR)/src/code/relocation.o"
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include "$(BUILD_DIR)/src/code/load.o"
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include "$(BUILD_DIR)/src/code/relocation_gc.o"
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include "$(BUILD_DIR)/src/code/load_gc.o"
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#endif
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include "$(BUILD_DIR)/src/code/code_800FC620.o"
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include "$(BUILD_DIR)/src/code/padutils.o"
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include "$(BUILD_DIR)/src/code/padsetup.o"
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209
src/code/loadfragment2_n64.c
Normal file
209
src/code/loadfragment2_n64.c
Normal file
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@ -0,0 +1,209 @@
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/**
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* @file loadfragment2_n64.c
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*
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* This file contains the routine responsible for runtime relocation of dynamically loadable code segments (overlays),
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* see the description of Overlay_Relocate for details.
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*
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* @see Overlay_Relocate
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*/
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#include "global.h"
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s32 gOverlayLogSeverity = 2;
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// Extract MIPS register rs from an instruction word
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#define MIPS_REG_RS(insn) (((insn) >> 0x15) & 0x1F)
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// Extract MIPS register rt from an instruction word
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#define MIPS_REG_RT(insn) (((insn) >> 0x10) & 0x1F)
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// Extract MIPS jump target from an instruction word
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#define MIPS_JUMP_TARGET(insn) (((insn)&0x03FFFFFF) << 2)
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/**
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* Performs runtime relocation of overlay files, loadable code segments.
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*
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* Overlays are expected to be loadable anywhere in direct-mapped cached (KSEG0) memory, with some appropriate
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* alignment requirements; memory addresses in such code must be updated once loaded to execute properly.
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* When compiled, overlays are given 'fake' KSEG0 RAM addresses larger than the total possible available main memory
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* (>= 0x80800000), such addresses are referred to as Virtual RAM (VRAM) to distinguish them. When loading the overlay,
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* the relocation table produced at compile time is consulted to determine where and how to update these VRAM addresses
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* to correct RAM addresses based on the location the overlay was loaded at, enabling the code to execute at this
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* address as if it were compiled to run at this address.
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*
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* Each relocation is represented by a packed 32-bit value, formatted in the following way:
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* - [31:30] 2-bit section id, taking values from the `RelocSectionId` enum.
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* - [29:24] 6-bit relocation type describing which relocation operation should be performed. Same as ELF32 MIPS.
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* - [23: 0] 24-bit section-relative offset indicating where in the section to apply this relocation.
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*
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* @param allocatedRamAddress Memory address the binary was loaded at.
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* @param ovlRelocs Overlay relocation section containing overlay section layout and runtime relocations.
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* @param vramStart Virtual RAM address that the overlay was compiled at.
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*/
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void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs, void* vramStart) {
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u32 sections[RELOC_SECTION_MAX];
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u32* relocDataP;
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u32 reloc;
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uintptr_t relocatedAddress;
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u32 i;
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u32* luiInstRef;
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u32 isLoNeg;
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u32* regValP;
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//! MIPS ELF relocation does not generally require tracking register values, so at first glance it appears this
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//! register tracking was an unnecessary complication. However there is a bug in the IDO compiler that can cause
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//! relocations to be emitted in the wrong order under rare circumstances when the compiler attempts to reuse a
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//! previous HI16 relocation for a different LO16 relocation as an optimization. This register tracking is likely
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//! a workaround to prevent improper matching of unrelated HI16 and LO16 relocations that would otherwise arise
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//! due to the incorrect ordering.
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u32* luiRefs[32];
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u32 luiVals[32];
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uintptr_t allocu32 = (uintptr_t)allocatedRamAddr;
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uintptr_t vramu32 = (uintptr_t)vramStart;
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf("DoRelocation(%08x, %08x, %08x)\n", allocatedRamAddr, ovlRelocs, vramStart);
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}
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sections[RELOC_SECTION_NULL] = 0;
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sections[RELOC_SECTION_TEXT] = allocu32;
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sections[RELOC_SECTION_DATA] = allocu32 + ovlRelocs->textSize;
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sections[RELOC_SECTION_RODATA] = sections[RELOC_SECTION_DATA] + ovlRelocs->dataSize;
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for (i = 0; i < ovlRelocs->nRelocations; i++) {
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// This will always resolve to a 32-bit aligned address as each section
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// containing code or pointers must be aligned to at least 4 bytes and the
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// MIPS ABI defines the offset of both 16-bit and 32-bit relocations to be
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// the start of the 32-bit word containing the target.
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reloc = ovlRelocs->relocations[i];
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relocDataP = (u32*)(sections[RELOC_SECTION(reloc)] + RELOC_OFFSET(reloc));
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switch (RELOC_TYPE_MASK(reloc)) {
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case R_MIPS_32 << RELOC_TYPE_SHIFT:
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// Handles 32-bit address relocation, used for things such as jump tables and pointers in data.
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// Just relocate the full address
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// Check address is valid for relocation
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if ((*relocDataP & 0x0F000000) == 0) {
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*relocDataP = *relocDataP - vramu32 + allocu32;
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} else if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("セグメントポインタ32です %08x\n", "Segment pointer 32 %08x\n"),
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*relocDataP - vramu32);
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}
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break;
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case R_MIPS_26 << RELOC_TYPE_SHIFT:
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// Handles 26-bit address relocation, used for jumps and jals.
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// Extract the address from the target field of the J-type MIPS instruction.
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// Relocate the address and update the instruction.
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if (1) {
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*relocDataP =
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(*relocDataP & 0xFC000000) |
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(((PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - vramu32 + allocu32) & 0x0FFFFFFF) >> 2);
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} else if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("セグメントポインタ26です %08x\n", "Segment pointer 26 %08x\n"),
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PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - vramu32);
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}
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break;
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case R_MIPS_HI16 << RELOC_TYPE_SHIFT:
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// Handles relocation for a hi/lo pair, part 1.
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// Store the reference to the LUI instruction (hi) using the `rt` register of the instruction.
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// This will be updated later in the `R_MIPS_LO16` section.
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luiRefs[(*relocDataP >> 0x10) & 0x1F] = relocDataP;
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luiVals[(*relocDataP >> 0x10) & 0x1F] = *relocDataP;
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break;
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case R_MIPS_LO16 << RELOC_TYPE_SHIFT:
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// Handles relocation for a hi/lo pair, part 2.
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// Grab the stored LUI (hi) from the `R_MIPS_HI16` section using the `rs` register of the instruction.
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// The full address is calculated, relocated, and then used to update both the LUI and lo instructions.
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// If the lo part is negative, add 1 to the LUI value.
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// Note: The lo instruction is assumed to have a signed immediate.
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luiInstRef = luiRefs[(*relocDataP >> 0x15) & 0x1F];
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regValP = &luiVals[(*relocDataP >> 0x15) & 0x1F];
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// Check address is valid for relocation
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if ((((*luiInstRef << 0x10) + (s16)*relocDataP) & 0x0F000000) == 0) {
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relocatedAddress = ((*regValP << 0x10) + (s16)*relocDataP) - vramu32 + allocu32;
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isLoNeg = (relocatedAddress & 0x8000) ? 1 : 0;
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*luiInstRef = (*luiInstRef & 0xFFFF0000) | (((relocatedAddress >> 0x10) & 0xFFFF) + isLoNeg);
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*relocDataP = (*relocDataP & 0xFFFF0000) | (relocatedAddress & 0xFFFF);
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} else if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("セグメントポインタ16です %08x %08x %08x\n", "Segment pointer 16 %08x %08x %08x\n"),
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((*luiInstRef << 0x10) + (s16)*relocDataP) - vramu32, *luiInstRef, *relocDataP);
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}
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break;
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}
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}
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}
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size_t Overlay_Load(uintptr_t vromStart, uintptr_t vromEnd, void* vramStart, void* vramEnd, void* allocatedRamAddr) {
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s32 pad[2];
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s32 size = vromEnd - vromStart;
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uintptr_t end;
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OverlayRelocationSection* ovlRelocs;
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(
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T("\nダイナミックリンクファンクションのロードを開始します\n", "\nStart loading dynamic link function\n"));
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}
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size = vromEnd - vromStart;
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end = (uintptr_t)allocatedRamAddr + size;
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("TEXT,DATA,RODATA+relをＤＭＡ転送します(%08x-%08x)\n",
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"DMA transfer TEXT, DATA, RODATA+rel (%08x-%08x)\n"),
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allocatedRamAddr, end);
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}
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DmaMgr_RequestSync(allocatedRamAddr, vromStart, size);
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// The overlay file is expected to contain a 32-bit offset from the end of the file to the start of the
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// relocation section.
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ovlRelocs = (OverlayRelocationSection*)(end - ((s32*)end)[-1]);
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf("TEXT(%08x), DATA(%08x), RODATA(%08x), BSS(%08x)\n", ovlRelocs->textSize, ovlRelocs->dataSize,
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ovlRelocs->rodataSize, (s32)ovlRelocs->bssSize);
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}
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("リロケーションします\n", "I will relocate\n"));
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}
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Overlay_Relocate(allocatedRamAddr, ovlRelocs, vramStart);
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// Casts suggest bssSize struct variable was an s32, but needs to be a u32 for the GC versions
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if ((s32)ovlRelocs->bssSize != 0) {
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("BSS領域をクリアします(%08x-%08x)\n", "Clear BSS area (%08x-%08x)\n"), end,
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end + (s32)ovlRelocs->bssSize);
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}
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bzero((void*)end, (s32)ovlRelocs->bssSize);
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}
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size = (uintptr_t)vramEnd - (uintptr_t)vramStart;
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osWritebackDCache(allocatedRamAddr, size);
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osInvalICache(allocatedRamAddr, size);
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if (gOverlayLogSeverity >= 3) {
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osSyncPrintf(T("ダイナミックリンクファンクションのロードを終了します\n\n",
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"Finish loading the dynamic link function\n\n"));
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}
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return size;
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}
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void* Overlay_AllocateAndLoad(uintptr_t vromStart, uintptr_t vromEnd, void* vramStart, void* vramEnd) {
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void* allocatedRamAddr = SYSTEM_ARENA_MALLOC_R((intptr_t)vramEnd - (intptr_t)vramStart, "../loadfragment2.c", 31);
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if (allocatedRamAddr != NULL) {
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Overlay_Load(vromStart, vromEnd, vramStart, vramEnd, allocatedRamAddr);
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}
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return allocatedRamAddr;
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}
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@ -60,7 +60,7 @@ void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlReloc
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u32 relocatedValue = 0;
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uintptr_t unrelocatedAddress = 0;
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uintptr_t relocatedAddress = 0;
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s32 pad;
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uintptr_t vramu32 = (uintptr_t)vramStart;
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if (gOverlayLogSeverity >= 3) {
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PRINTF("DoRelocation(%08x, %08x, %08x)\n", allocatedRamAddr, ovlRelocs, vramStart);
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@ -88,7 +88,7 @@ void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlReloc
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// Check address is valid for relocation
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if ((*relocDataP & 0x0F000000) == 0) {
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relocOffset = *relocDataP - (uintptr_t)vramStart;
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relocOffset = *relocDataP - vramu32;
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relocatedValue = relocOffset + allocu32;
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relocatedAddress = relocatedValue;
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unrelocatedAddress = relocData;
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@ -101,7 +101,7 @@ void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlReloc
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// Extract the address from the target field of the J-type MIPS instruction.
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// Relocate the address and update the instruction.
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if (1) {
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relocOffset = PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - (uintptr_t)vramStart;
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relocOffset = PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - vramu32;
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unrelocatedAddress = PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP));
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relocatedValue = (*relocDataP & 0xFC000000) | (((allocu32 + relocOffset) & 0x0FFFFFFF) >> 2);
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relocatedAddress = PHYS_TO_K0(MIPS_JUMP_TARGET(relocatedValue));
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@ -130,7 +130,7 @@ void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlReloc
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// Check address is valid for relocation
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if ((((*regValP << 0x10) + (s16)*relocDataP) & 0x0F000000) == 0) {
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relocOffset = ((*regValP << 0x10) + (s16)*relocDataP) - (uintptr_t)vramStart;
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relocOffset = ((*regValP << 0x10) + (s16)*relocDataP) - vramu32;
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isLoNeg = ((relocOffset + allocu32) & 0x8000) ? 1 : 0; // adjust for signed immediate
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unrelocatedAddress = (*luiInstRef << 0x10) + (s16)relocData;
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*luiInstRef =
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@ -154,7 +154,7 @@ void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlReloc
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case R_MIPS_LO16 << RELOC_TYPE_SHIFT:
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if (gOverlayLogSeverity >= 3) {
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PRINTF("%02d %08x %08x %08x ", dbg, relocDataP, relocatedValue, relocatedAddress);
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PRINTF(" %08x %08x %08x %08x\n", (uintptr_t)relocDataP + (uintptr_t)vramStart - allocu32, relocData,
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PRINTF(" %08x %08x %08x %08x\n", (uintptr_t)relocDataP + vramu32 - allocu32, relocData,
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unrelocatedAddress, relocOffset);
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}
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// Adding a break prevents matching
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@ -124,7 +124,7 @@ B70B0,800C8790,src/audio/sfx
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B8F00,800CA5E0,src/audio/sequence
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BAB20,800CC200,src/code/gfxprint
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BB720,800CCE00,src/code/rcp_utils
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BBA50,800CD130,src/code/load
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BBA50,800CD130,src/code/loadfragment2_n64
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BBF00,800CD5E0,src/code/padutils
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BC110,800CD7F0,src/code/code_800FC620
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BC530,800CDC10,src/code/padsetup
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@ -289,7 +289,7 @@ F1EF0,801035D0,src/audio/sfx_params
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F32C0,801049A0,src/audio/data
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F3330,80104A10,src/audio/session_config
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F3AD0,801051B0,src/code/gfxprint
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F4380,80105A60,src/code/logseverity
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F4380,80105A60,src/code/loadfragment2_n64
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F4390,80105A70,src/code/code_800FC620
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F43A0,80105A80,src/code/rand
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F43B0,80105A90,src/code/__osMalloc
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@ -377,7 +377,7 @@ F9100,8010A7E0,src/audio/sequence
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F9180,8010A860,src/audio/session_config
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F9190,8010A870,src/code/gfxprint
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F91D0,8010A8B0,src/code/rcp_utils
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F9320,8010AA00,src/code/load
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F9320,8010AA00,src/code/loadfragment2_n64
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F94C0,8010ABA0,src/code/fp_math
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F9690,8010AD70,src/libultra/gu/sinf
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F96E0,8010ADC0,src/libultra/gu/perspective
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