mirror of
https://github.com/zeldaret/oot.git
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libm.s -> ll.c (#661)
* . * remove tools/ZAP2 from origin master * libm.s -> ll.c * fix progress.py (i think?)
This commit is contained in:
Lucas Shaw
GitHub
parent
8e8421fdec
commit
6fd644dff5
5 changed files with 56 additions and 220 deletions
7
Makefile
7
Makefile
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@ -143,6 +143,7 @@ build/src/libultra_code_O1/%.o: OPTFLAGS := -O1
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build/src/libultra_code_O2/%.o: OPTFLAGS := -O2
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build/src/libultra_code_O2/%.o: OPTFLAGS := -O2
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build/src/libultra_code_O2_g3/%.o: OPTFLAGS := -O2 -g3
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build/src/libultra_code_O2_g3/%.o: OPTFLAGS := -O2 -g3
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build/src/libultra_boot_O1/ll.o: MIPS_VERSION := -mips3 -32
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build/src/libultra_code_O1/llcvt.o: MIPS_VERSION := -mips3 -32
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build/src/libultra_code_O1/llcvt.o: MIPS_VERSION := -mips3 -32
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build/src/code/fault.o: CFLAGS += -trapuv
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build/src/code/fault.o: CFLAGS += -trapuv
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@ -232,6 +233,12 @@ build/src/%.o: src/%.c
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$(CC_CHECK) $^
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$(CC_CHECK) $^
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@$(OBJDUMP) -d $@ > $(@:.o=.s)
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@$(OBJDUMP) -d $@ > $(@:.o=.s)
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build/src/libultra_boot_O1/ll.o: src/libultra_boot_O1/ll.c
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$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $^
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$(CC_CHECK) $^
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python3 tools/set_o32abi_bit.py $@
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@$(OBJDUMP) -d $@ > $(@:.o=.s)
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build/src/libultra_code_O1/llcvt.o: src/libultra_code_O1/llcvt.c
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build/src/libultra_code_O1/llcvt.o: src/libultra_code_O1/llcvt.c
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$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $^
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$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $^
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$(CC_CHECK) $^
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$(CC_CHECK) $^
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218
asm/libm.s
218
asm/libm.s
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@ -1,218 +0,0 @@
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.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.section .text
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.balign 16
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glabel __ull_rshift
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/* 004310 80003710 AFA40000 */ sw $a0, ($sp)
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/* 004314 80003714 AFA50004 */ sw $a1, 4($sp)
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/* 004318 80003718 AFA60008 */ sw $a2, 8($sp)
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/* 00431C 8000371C AFA7000C */ sw $a3, 0xc($sp)
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/* 004320 80003720 DFAF0008 */ ld $t7, 8($sp)
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/* 004324 80003724 DFAE0000 */ ld $t6, ($sp)
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/* 004328 80003728 01EE1016 */ dsrlv $v0, $t6, $t7
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/* 00432C 8000372C 0002183C */ dsll32 $v1, $v0, 0
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/* 004330 80003730 0003183F */ dsra32 $v1, $v1, 0
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/* 004334 80003734 03E00008 */ jr $ra
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/* 004338 80003738 0002103F */ dsra32 $v0, $v0, 0
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glabel __ull_rem
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/* 00433C 8000373C AFA40000 */ sw $a0, ($sp)
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/* 004340 80003740 AFA50004 */ sw $a1, 4($sp)
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/* 004344 80003744 AFA60008 */ sw $a2, 8($sp)
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/* 004348 80003748 AFA7000C */ sw $a3, 0xc($sp)
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/* 00434C 8000374C DFAF0008 */ ld $t7, 8($sp)
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/* 004350 80003750 DFAE0000 */ ld $t6, ($sp)
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/* 004354 80003754 01CF001F */ ddivu $zero, $t6, $t7
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/* 004358 80003758 15E00002 */ bnez $t7, .L80003764
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/* 00435C 8000375C 00000000 */ nop
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/* 004360 80003760 0007000D */ break 7
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.L80003764:
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/* 004364 80003764 00001010 */ mfhi $v0
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/* 004368 80003768 0002183C */ dsll32 $v1, $v0, 0
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/* 00436C 8000376C 0003183F */ dsra32 $v1, $v1, 0
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/* 004370 80003770 03E00008 */ jr $ra
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/* 004374 80003774 0002103F */ dsra32 $v0, $v0, 0
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glabel __ull_div
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/* 004378 80003778 AFA40000 */ sw $a0, ($sp)
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/* 00437C 8000377C AFA50004 */ sw $a1, 4($sp)
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/* 004380 80003780 AFA60008 */ sw $a2, 8($sp)
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/* 004384 80003784 AFA7000C */ sw $a3, 0xc($sp)
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/* 004388 80003788 DFAF0008 */ ld $t7, 8($sp)
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/* 00438C 8000378C DFAE0000 */ ld $t6, ($sp)
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/* 004390 80003790 01CF001F */ ddivu $zero, $t6, $t7
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/* 004394 80003794 15E00002 */ bnez $t7, .L800037A0
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/* 004398 80003798 00000000 */ nop
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/* 00439C 8000379C 0007000D */ break 7
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.L800037A0:
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/* 0043A0 800037A0 00001012 */ mflo $v0
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/* 0043A4 800037A4 0002183C */ dsll32 $v1, $v0, 0
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/* 0043A8 800037A8 0003183F */ dsra32 $v1, $v1, 0
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/* 0043AC 800037AC 03E00008 */ jr $ra
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/* 0043B0 800037B0 0002103F */ dsra32 $v0, $v0, 0
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glabel __ll_lshift
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/* 0043B4 800037B4 AFA40000 */ sw $a0, ($sp)
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/* 0043B8 800037B8 AFA50004 */ sw $a1, 4($sp)
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/* 0043BC 800037BC AFA60008 */ sw $a2, 8($sp)
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/* 0043C0 800037C0 AFA7000C */ sw $a3, 0xc($sp)
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/* 0043C4 800037C4 DFAF0008 */ ld $t7, 8($sp)
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/* 0043C8 800037C8 DFAE0000 */ ld $t6, ($sp)
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/* 0043CC 800037CC 01EE1014 */ dsllv $v0, $t6, $t7
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/* 0043D0 800037D0 0002183C */ dsll32 $v1, $v0, 0
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/* 0043D4 800037D4 0003183F */ dsra32 $v1, $v1, 0
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/* 0043D8 800037D8 03E00008 */ jr $ra
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/* 0043DC 800037DC 0002103F */ dsra32 $v0, $v0, 0
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glabel __ll_rem
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/* 0043E0 800037E0 AFA40000 */ sw $a0, ($sp)
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/* 0043E4 800037E4 AFA50004 */ sw $a1, 4($sp)
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/* 0043E8 800037E8 AFA60008 */ sw $a2, 8($sp)
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/* 0043EC 800037EC AFA7000C */ sw $a3, 0xc($sp)
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/* 0043F0 800037F0 DFAF0008 */ ld $t7, 8($sp)
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/* 0043F4 800037F4 DFAE0000 */ ld $t6, ($sp)
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/* 0043F8 800037F8 01CF001F */ ddivu $zero, $t6, $t7
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/* 0043FC 800037FC 15E00002 */ bnez $t7, .L80003808
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/* 004400 80003800 00000000 */ nop
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/* 004404 80003804 0007000D */ break 7
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.L80003808:
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/* 004408 80003808 00001010 */ mfhi $v0
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/* 00440C 8000380C 0002183C */ dsll32 $v1, $v0, 0
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/* 004410 80003810 0003183F */ dsra32 $v1, $v1, 0
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/* 004414 80003814 03E00008 */ jr $ra
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/* 004418 80003818 0002103F */ dsra32 $v0, $v0, 0
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glabel __ll_div
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/* 00441C 8000381C AFA40000 */ sw $a0, ($sp)
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/* 004420 80003820 AFA50004 */ sw $a1, 4($sp)
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/* 004424 80003824 AFA60008 */ sw $a2, 8($sp)
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/* 004428 80003828 AFA7000C */ sw $a3, 0xc($sp)
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/* 00442C 8000382C DFAF0008 */ ld $t7, 8($sp)
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/* 004430 80003830 DFAE0000 */ ld $t6, ($sp)
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/* 004434 80003834 01CF001E */ ddiv $zero, $t6, $t7
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/* 004438 80003838 00000000 */ nop
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/* 00443C 8000383C 15E00002 */ bnez $t7, .L80003848
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/* 004440 80003840 00000000 */ nop
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/* 004444 80003844 0007000D */ break 7
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.L80003848:
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/* 004448 80003848 6401FFFF */ daddiu $at, $zero, -1
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/* 00444C 8000384C 15E10005 */ bne $t7, $at, .L80003864
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/* 004450 80003850 64010001 */ daddiu $at, $zero, 1
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/* 004454 80003854 00010FFC */ dsll32 $at, $at, 0x1f
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/* 004458 80003858 15C10002 */ bne $t6, $at, .L80003864
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/* 00445C 8000385C 00000000 */ nop
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/* 004460 80003860 0006000D */ break 6
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.L80003864:
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/* 004464 80003864 00001012 */ mflo $v0
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/* 004468 80003868 0002183C */ dsll32 $v1, $v0, 0
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/* 00446C 8000386C 0003183F */ dsra32 $v1, $v1, 0
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/* 004470 80003870 03E00008 */ jr $ra
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/* 004474 80003874 0002103F */ dsra32 $v0, $v0, 0
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glabel __ll_mul
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/* 004478 80003878 AFA40000 */ sw $a0, ($sp)
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/* 00447C 8000387C AFA50004 */ sw $a1, 4($sp)
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/* 004480 80003880 AFA60008 */ sw $a2, 8($sp)
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/* 004484 80003884 AFA7000C */ sw $a3, 0xc($sp)
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/* 004488 80003888 DFAF0008 */ ld $t7, 8($sp)
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/* 00448C 8000388C DFAE0000 */ ld $t6, ($sp)
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/* 004490 80003890 01CF001D */ dmultu $t6, $t7
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/* 004494 80003894 00001012 */ mflo $v0
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/* 004498 80003898 0002183C */ dsll32 $v1, $v0, 0
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/* 00449C 8000389C 0003183F */ dsra32 $v1, $v1, 0
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/* 0044A0 800038A0 03E00008 */ jr $ra
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/* 0044A4 800038A4 0002103F */ dsra32 $v0, $v0, 0
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glabel __ull_divremi
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/* 0044A8 800038A8 87AF0012 */ lh $t7, 0x12($sp)
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/* 0044AC 800038AC AFA60008 */ sw $a2, 8($sp)
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/* 0044B0 800038B0 AFA7000C */ sw $a3, 0xc($sp)
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/* 0044B4 800038B4 DFAE0008 */ ld $t6, 8($sp)
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/* 0044B8 800038B8 01E0C025 */ move $t8, $t7
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/* 0044BC 800038BC 0300C825 */ move $t9, $t8
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/* 0044C0 800038C0 01D9001F */ ddivu $zero, $t6, $t9
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/* 0044C4 800038C4 17200002 */ bnez $t9, .L800038D0
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/* 0044C8 800038C8 00000000 */ nop
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/* 0044CC 800038CC 0007000D */ break 7
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.L800038D0:
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/* 0044D0 800038D0 00004012 */ mflo $t0
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/* 0044D4 800038D4 FC880000 */ sd $t0, ($a0)
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/* 0044D8 800038D8 87AA0012 */ lh $t2, 0x12($sp)
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/* 0044DC 800038DC DFA90008 */ ld $t1, 8($sp)
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/* 0044E0 800038E0 01405825 */ move $t3, $t2
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/* 0044E4 800038E4 01606025 */ move $t4, $t3
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/* 0044E8 800038E8 012C001F */ ddivu $zero, $t1, $t4
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/* 0044EC 800038EC 15800002 */ bnez $t4, .L800038F8
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/* 0044F0 800038F0 00000000 */ nop
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/* 0044F4 800038F4 0007000D */ break 7
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.L800038F8:
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/* 0044F8 800038F8 00006810 */ mfhi $t5
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/* 0044FC 800038FC FCAD0000 */ sd $t5, ($a1)
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/* 004500 80003900 03E00008 */ jr $ra
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/* 004504 80003904 00000000 */ nop
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glabel __ll_mod
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/* 004508 80003908 27BDFFF8 */ addiu $sp, $sp, -8
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/* 00450C 8000390C AFA40008 */ sw $a0, 8($sp)
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/* 004510 80003910 AFA5000C */ sw $a1, 0xc($sp)
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/* 004514 80003914 AFA60010 */ sw $a2, 0x10($sp)
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/* 004518 80003918 AFA70014 */ sw $a3, 0x14($sp)
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/* 00451C 8000391C DFAF0010 */ ld $t7, 0x10($sp)
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/* 004520 80003920 DFAE0008 */ ld $t6, 8($sp)
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/* 004524 80003924 01CF001E */ ddiv $zero, $t6, $t7
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/* 004528 80003928 00000000 */ nop
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/* 00452C 8000392C 15E00002 */ bnez $t7, .L80003938
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/* 004530 80003930 00000000 */ nop
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/* 004534 80003934 0007000D */ break 7
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.L80003938:
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/* 004538 80003938 6401FFFF */ daddiu $at, $zero, -1
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/* 00453C 8000393C 15E10005 */ bne $t7, $at, .L80003954
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/* 004540 80003940 64010001 */ daddiu $at, $zero, 1
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/* 004544 80003944 00010FFC */ dsll32 $at, $at, 0x1f
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/* 004548 80003948 15C10002 */ bne $t6, $at, .L80003954
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/* 00454C 8000394C 00000000 */ nop
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/* 004550 80003950 0006000D */ break 6
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.L80003954:
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/* 004554 80003954 0000C010 */ mfhi $t8
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/* 004558 80003958 FFB80000 */ sd $t8, ($sp)
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/* 00455C 8000395C 07010003 */ bgez $t8, .L8000396C
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/* 004560 80003960 00000000 */ nop
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/* 004564 80003964 1DE00007 */ bgtz $t7, .L80003984
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/* 004568 80003968 00000000 */ nop
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.L8000396C:
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/* 00456C 8000396C DFB90000 */ ld $t9, ($sp)
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/* 004570 80003970 1B200008 */ blez $t9, .L80003994
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/* 004574 80003974 00000000 */ nop
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/* 004578 80003978 DFA80010 */ ld $t0, 0x10($sp)
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/* 00457C 8000397C 05010005 */ bgez $t0, .L80003994
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/* 004580 80003980 00000000 */ nop
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.L80003984:
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/* 004584 80003984 DFA90000 */ ld $t1, ($sp)
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/* 004588 80003988 DFAA0010 */ ld $t2, 0x10($sp)
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/* 00458C 8000398C 012A582D */ daddu $t3, $t1, $t2
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/* 004590 80003990 FFAB0000 */ sd $t3, ($sp)
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.L80003994:
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/* 004594 80003994 8FA20000 */ lw $v0, ($sp)
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/* 004598 80003998 8FA30004 */ lw $v1, 4($sp)
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/* 00459C 8000399C 03E00008 */ jr $ra
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/* 0045A0 800039A0 27BD0008 */ addiu $sp, $sp, 8
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glabel __ll_rshift
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/* 0045A4 800039A4 AFA40000 */ sw $a0, ($sp)
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/* 0045A8 800039A8 AFA50004 */ sw $a1, 4($sp)
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/* 0045AC 800039AC AFA60008 */ sw $a2, 8($sp)
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/* 0045B0 800039B0 AFA7000C */ sw $a3, 0xc($sp)
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/* 0045B4 800039B4 DFAF0008 */ ld $t7, 8($sp)
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/* 0045B8 800039B8 DFAE0000 */ ld $t6, ($sp)
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/* 0045BC 800039BC 01EE1017 */ dsrav $v0, $t6, $t7
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/* 0045C0 800039C0 0002183C */ dsll32 $v1, $v0, 0
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/* 0045C4 800039C4 0003183F */ dsra32 $v1, $v1, 0
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/* 0045C8 800039C8 03E00008 */ jr $ra
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/* 0045CC 800039CC 0002103F */ dsra32 $v0, $v0, 0
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@ -98,7 +98,7 @@ boot -= nonMatchingASMBoot
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ovl -= nonMatchingASMOvl
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ovl -= nonMatchingASMOvl
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asm += nonMatchingASM
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asm += nonMatchingASM
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bootSize = 30704 # decompilable code only
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bootSize = 31408 # decompilable code only
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codeSize = 1004128 # .text section except rsp bins (1.00mb)
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codeSize = 1004128 # .text section except rsp bins (1.00mb)
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ovlSize = 2812000 # .text sections
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ovlSize = 2812000 # .text sections
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handwritten = 5840 # boot only
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handwritten = 5840 # boot only
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2
spec
2
spec
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@ -32,7 +32,7 @@ beginseg
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include "build/src/libultra_boot_O1/osViModePalLan1.o"
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include "build/src/libultra_boot_O1/osViModePalLan1.o"
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include "build/src/libultra_boot_O1/osRecvMesg.o"
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include "build/src/libultra_boot_O1/osRecvMesg.o"
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||||||
include "build/src/libultra_boot_O1/initialize.o"
|
include "build/src/libultra_boot_O1/initialize.o"
|
||||||
include "build/asm/libm.o"
|
include "build/src/libultra_boot_O1/ll.o"
|
||||||
include "build/asm/exceptasm.o"
|
include "build/asm/exceptasm.o"
|
||||||
include "build/src/libultra_boot_O1/__osDequeueThread.o"
|
include "build/src/libultra_boot_O1/__osDequeueThread.o"
|
||||||
include "build/src/libultra_boot_O1/osDestroyThread.o"
|
include "build/src/libultra_boot_O1/osDestroyThread.o"
|
||||||
|
|
|
||||||
47
src/libultra_boot_O1/ll.c
Normal file
47
src/libultra_boot_O1/ll.c
Normal file
|
|
@ -0,0 +1,47 @@
|
||||||
|
#include "global.h"
|
||||||
|
|
||||||
|
s64 __ull_rshift(u64 l, s64 r) {
|
||||||
|
return l >> r;
|
||||||
|
}
|
||||||
|
|
||||||
|
u64 __ull_rem(u64 l, u64 r) {
|
||||||
|
return l % r;
|
||||||
|
}
|
||||||
|
|
||||||
|
u64 __ull_div(u64 l, u64 r) {
|
||||||
|
return l / r;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_lshift(s64 l, s64 r) {
|
||||||
|
return l << r;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_rem(s64 l, u64 r) {
|
||||||
|
return l % r;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_div(s64 l, s64 r) {
|
||||||
|
return l / r;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_mul(s64 l, s64 r) {
|
||||||
|
return l * r;
|
||||||
|
}
|
||||||
|
|
||||||
|
void __ull_divremi(u64* quotient, u64* remainder, u64 dividend, u16 divisor) {
|
||||||
|
*quotient = dividend / divisor;
|
||||||
|
*remainder = dividend % divisor;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_mod(s64 l, s64 r) {
|
||||||
|
s64 remainder = l % r;
|
||||||
|
|
||||||
|
if (((remainder < 0) && (r > 0)) || ((remainder > 0) && (r < 0))) {
|
||||||
|
remainder += r;
|
||||||
|
}
|
||||||
|
return remainder;
|
||||||
|
}
|
||||||
|
|
||||||
|
s64 __ll_rshift(s64 l, s64 r) {
|
||||||
|
return l >> r;
|
||||||
|
}
|
||||||
Loading…
Reference in a new issue