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[iQue] Match PI-related files in libultra/io (#2408)
* [iQue] Match PI-related files in libultra/io, set correct thread ID for vimgr * Create a define for the hardcoded address in devmgr.c * Fix BSS
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Tharo
GitHub
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b19b06a531
commit
8d213e61cf
4 changed files with 143 additions and 2 deletions
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@ -190,6 +190,16 @@
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*/
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#define PI_NAND_CTRL_REG (PI_BASE_REG + 0x48)
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/**
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* PI internal buffer DMA read length. Writes initiate a DMA from RDRAM to the PI buffer.
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*/
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#define PI_EX_RD_LEN_REG (PI_BASE_REG + 0x58)
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/**
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* PI internal buffer DMA write length. Writes initiate a DMA from the PI buffer to RDRAM.
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*/
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#define PI_EX_WR_LEN_REG (PI_BASE_REG + 0x5C)
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/**
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* [31:16] Box ID
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* [31:30] Hardware Revision? (osInitialize checks this and sets __osBbIsBb to 2 if != 0)
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@ -2,6 +2,8 @@
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#include "ultra64/internal.h"
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#include "ultra64/leodrive.h"
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#define TEMP_BUFFER ((void*)0x80600000)
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// os.h
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#define LEO_BLOCK_MODE 1
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#define LEO_TRACK_MODE 2
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@ -14,6 +16,9 @@ void __osDevMgrMain(void* arg) {
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s32 ret;
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OSDevMgr* dm = (OSDevMgr*)arg;
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s32 messageSend;
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#ifdef BBPLAYER
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s32 check = false;
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#endif
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while (true) {
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osRecvMesg(dm->cmdQueue, (OSMesg*)&ioMesg, OS_MESG_BLOCK);
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@ -78,6 +83,13 @@ void __osDevMgrMain(void* arg) {
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switch (ioMesg->hdr.type) {
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case OS_MESG_TYPE_DMAREAD:
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osRecvMesg(dm->acsQueue, &dummy, OS_MESG_BLOCK);
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#ifdef BBPLAYER
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if (__osBbIsBb == 1 && ((u32)ioMesg->dramAddr & 0x7F) >= 0x60) {
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check = true;
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ret = dm->dma(OS_READ, ioMesg->devAddr, TEMP_BUFFER, ioMesg->size);
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break;
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}
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#endif
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ret = dm->dma(OS_READ, ioMesg->devAddr, ioMesg->dramAddr, ioMesg->size);
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break;
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case OS_MESG_TYPE_DMAWRITE:
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@ -86,6 +98,13 @@ void __osDevMgrMain(void* arg) {
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break;
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case OS_MESG_TYPE_EDMAREAD:
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osRecvMesg(dm->acsQueue, &dummy, OS_MESG_BLOCK);
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#ifdef BBPLAYER
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if (__osBbIsBb == 1 && ((u32)ioMesg->dramAddr & 0x7F) >= 0x60) {
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check = true;
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ret = dm->edma(ioMesg->piHandle, OS_READ, ioMesg->devAddr, TEMP_BUFFER, ioMesg->size);
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break;
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}
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#endif
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ret = dm->edma(ioMesg->piHandle, OS_READ, ioMesg->devAddr, ioMesg->dramAddr, ioMesg->size);
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break;
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case OS_MESG_TYPE_EDMAWRITE:
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@ -103,6 +122,14 @@ void __osDevMgrMain(void* arg) {
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if (ret == 0) {
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osRecvMesg(dm->evtQueue, &em, OS_MESG_BLOCK);
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#ifdef BBPLAYER
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if (__osBbIsBb == 1 && check) {
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osInvalDCache(TEMP_BUFFER, (ioMesg->size + DCACHE_LINEMASK) & ~DCACHE_LINEMASK);
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bcopy(TEMP_BUFFER, ioMesg->dramAddr, ioMesg->size);
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check = false;
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osWritebackDCache(ioMesg->dramAddr, ioMesg->size);
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}
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#endif
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osSendMesg(ioMesg->hdr.retQueue, (OSMesg)ioMesg, OS_MESG_NOBLOCK);
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osSendMesg(dm->acsQueue, NULL, OS_MESG_NOBLOCK);
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}
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@ -1,8 +1,18 @@
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#include "global.h"
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#include "ultra64/bcp.h"
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s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dramAddr, size_t size) {
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s32 status;
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#ifdef BBPLAYER
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u64 dummybuf[2];
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#endif
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u32 status;
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OSPiHandle* curHandle;
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#ifdef BBPLAYER
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u32 buffer;
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u32 pgsize;
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u16* adr;
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u32 i;
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#endif
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status = IO_READ(PI_STATUS_REG);
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while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
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@ -53,9 +63,102 @@ s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dr
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curHandle->pulse = handle->pulse;
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}
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#ifdef BBPLAYER
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if (direction == OS_READ) {
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// Device page size in bytes
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pgsize = 1;
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for (i = 1; i <= (u32)handle->pageSize + 2; i++) {
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pgsize *= 2;
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}
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// If the initial cart address mod pgsize is at the last u16 in the page,
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// need to do some manual DMAs?
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if ((cartAddr & (pgsize - 1)) == pgsize - sizeof(u16)) {
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// Read 32 bits starting 2 bytes before the target DMA address,
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// so that the lower 16 bits of the result are the first 2 bytes
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// of the requested data.
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__osEPiRawReadIo(handle, cartAddr - sizeof(u16), &buffer);
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// Poke the lower 16 bits into the destination address
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adr = (u16*)PHYS_TO_K1(dramAddr);
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*(adr++) = (u16)buffer;
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// Update DMA parameters
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cartAddr += sizeof(u16);
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dramAddr = adr;
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size -= sizeof(u16);
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// If the remaining size is >= 4
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if (size >= sizeof(u32)) {
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// Read another 32 bits at the cart addr
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__osEPiRawReadIo(handle, cartAddr, &buffer);
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// Store all 32 bits to RAM
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adr = (u16*)dramAddr;
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*(adr++) = buffer >> 16;
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*(adr++) = (u16)buffer;
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// Update DMA parameters again
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cartAddr += sizeof(u32);
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dramAddr = adr;
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size -= sizeof(u32);
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// If we're not at the end of the DMA
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if (size != 0) {
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// Read 32 bits again
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__osEPiRawReadIo(handle, cartAddr, &buffer);
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// Store just the upper 16 bits
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adr = (u16*)PHYS_TO_K1(dramAddr);
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*(adr++) = buffer >> 16;
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// Update DMA parameters once more
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cartAddr += sizeof(u16);
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dramAddr = adr;
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size -= sizeof(u16);
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}
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}
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}
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// If the end cart address mod pgsize is just 2 bytes into a page or the remaining data size is just 1x u16
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if (((((cartAddr + size) & (pgsize - 1)) == sizeof(u16)) | (size == sizeof(u16))) != 0) {
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if ((cartAddr + size) & 2) {
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// Read 32 bits at end - 2, store the upper 16 bits
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__osEPiRawReadIo(handle, cartAddr + size - sizeof(u16), &buffer);
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adr = (u16*)PHYS_TO_K1(dramAddr) + (size - sizeof(u16)) / sizeof(u16);
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*adr = buffer >> 16;
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} else {
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// Read 32 bits at end - 4, store the lower 16 bits
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__osEPiRawReadIo(handle, cartAddr + size - sizeof(u32), &buffer);
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adr = (u16*)PHYS_TO_K1(dramAddr) + (size - sizeof(u16)) / sizeof(u16);
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*adr = (u16)buffer;
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}
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size -= sizeof(u16);
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}
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if (size == 0) {
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// If size ended up 0 following the adjustments, run an 8-byte dummy DMA anyway
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size = 8;
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dramAddr = (void*)dummybuf;
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cartAddr = 0;
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}
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}
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#endif
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IO_WRITE(PI_DRAM_ADDR_REG, osVirtualToPhysical(dramAddr));
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IO_WRITE(PI_CART_ADDR_REG, K1_TO_PHYS(handle->baseAddress | cartAddr));
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#ifdef BBPLAYER
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if (direction != OS_READ && direction != OS_WRITE) {
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return -1;
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}
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if ((handle->baseAddress | cartAddr) <= 0x400) {
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IO_WRITE((direction == OS_READ) ? PI_EX_WR_LEN_REG : PI_EX_RD_LEN_REG, size - 1);
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} else {
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IO_WRITE((direction == OS_READ) ? PI_WR_LEN_REG : PI_RD_LEN_REG, size - 1);
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}
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#else
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switch (direction) {
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case OS_READ:
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IO_WRITE(PI_WR_LEN_REG, size - 1);
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@ -66,5 +169,6 @@ s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dr
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default:
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return -1;
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}
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#endif
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return 0;
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}
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@ -40,8 +40,8 @@ void osCreatePiManager(OSPri pri, OSMesgQueue* cmdQueue, OSMesg* cmdBuf, s32 cmd
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prevInt = __osDisableInt();
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__osPiDevMgr.active = true;
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__osPiDevMgr.cmdQueue = cmdQueue;
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__osPiDevMgr.thread = &piThread;
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__osPiDevMgr.cmdQueue = cmdQueue;
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__osPiDevMgr.evtQueue = &piEventQueue;
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__osPiDevMgr.acsQueue = &__osPiAccessQueue;
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__osPiDevMgr.dma = __osPiRawStartDma;
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