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[iQue] Match remaining libultra/os files (#2414)
* Match remaining libultra/os files * Align box id macros * Fix bss, format * Fix BSS * Clarify some comments * More bug comment * Comment * Fix BSS
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23 changed files with 197 additions and 61 deletions
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@ -190,4 +190,76 @@
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*/
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#define PI_NAND_CTRL_REG (PI_BASE_REG + 0x48)
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/**
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* [31:16] Box ID
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* [31:30] Hardware Revision? (osInitialize checks this and sets __osBbIsBb to 2 if != 0)
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* [29:27] ?? (not seen)
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* [26:25] ?? (system clock speed identifier?)
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* [24:22] ?? (bootrom, checked against MI_10_REG and copied there if mismatch)
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* [21:16] ?? (not seen)
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* [ 7: 4] GPIO direction control
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* [7] RTC Data output enable
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* [6] RTC Clock output enable
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* [5] Error LED output enable
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* [4] Power Control output enable
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* [ 3: 0] GPIO in/out value
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* [3] RTC Data output value (0=low, 1=high)
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* [2] RTC Clock output value (0=low, 1=high)
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* [1] Error LED (0=on, 1=off)
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* [0] Power Control (0=off, 1=on)
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*/
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#define PI_GPIO_REG (PI_BASE_REG + 0x60)
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/* Box ID */
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#define PI_GPIO_GET_BOXID(reg) ((reg) >> 16)
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#define PI_GPIO_IS_HW_V2(reg) ((reg) & (3 << 30))
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/* GPIO: Input/Output enables */
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#define PI_GPIO_I_PWR ((0 << 0) << 4)
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#define PI_GPIO_O_PWR ((1 << 0) << 4)
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#define PI_GPIO_I_LED ((0 << 1) << 4)
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#define PI_GPIO_O_LED ((1 << 1) << 4)
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#define PI_GPIO_I_RTC_CLK ((0 << 2) << 4)
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#define PI_GPIO_O_RTC_CLK ((1 << 2) << 4)
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#define PI_GPIO_I_RTC_DAT ((0 << 3) << 4)
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#define PI_GPIO_O_RTC_DAT ((1 << 3) << 4)
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/* GPIO: Output controls */
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/* Power */
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#define PI_GPIO_PWR_OFF (0 << 0)
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#define PI_GPIO_PWR_ON (1 << 0)
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/* LED */
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#define PI_GPIO_LED_ON (0 << 1)
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#define PI_GPIO_LED_OFF (1 << 1)
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/* RTC */
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#define PI_GPIO_RTC_CLK_LO (0 << 2)
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#define PI_GPIO_RTC_CLK_HI (1 << 2)
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#define PI_GPIO_RTC_DAT_LO (0 << 3)
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#define PI_GPIO_RTC_DAT_HI (1 << 3)
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/* GPIO: Input getters */
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#define PI_GPIO_GET_PWR(reg) (((reg) >> 0) & 1)
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#define PI_GPIO_GET_LED(reg) (((reg) >> 1) & 1)
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#define PI_GPIO_GET_RTC_CLK(reg) (((reg) >> 2) & 1)
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#define PI_GPIO_GET_RTC_DAT(reg) (((reg) >> 3) & 1)
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/**
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* [31] ?
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*/
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#define PI_64_REG (PI_BASE_REG + 0x64)
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/******************************************************************************
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* Additional Serial Interface (SI) Registers
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*/
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/**
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* ?
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*/
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#define SI_0C_REG (SI_BASE_REG + 0x0C)
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/**
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* ?
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*/
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#define SI_1C_REG (SI_BASE_REG + 0x1C)
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#endif
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