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Make func_800C213C match original ROM (#678)
* Make func_800C213C match original ROM The C code for this function was very close to done, and was functionally equivalent to the ROM. This commit uses a few tricks to convince the compiler to allocate the same registers as the original ROM. The two tricks used are: 1. Introduced a new temporary variable "yinc". 2. Added a "do while(0) {}" line in two places. Both of these ideas came from the decomp-permuter tool. I took the do/while idea and guess as to what it might have been in the original code. I imagined that the "do while(0) {}" was probably left over from a standard multi-line macro, which for some reason had an empty body. I further suggest that maybe the empty body is because it was a feature compiled out during RELEASE builds - perhaps a debug logging macro. * Use simpler code for func_800C213C Replaced dummy LOG macro with "do {} while(0);". This version makes less assumptions about what the original code looked like.
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2 changed files with 8 additions and 265 deletions
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@ -308,14 +308,13 @@ void func_800C2118(PreRenderContext* this, Gfx** gfxp) {
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func_800C0F28(this, gfxp, this->zbufSave, this->zbuf);
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}
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#ifdef NON_MATCHING
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// regalloc differences in gDPLoadMultiTile
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void func_800C213C(PreRenderContext* this, Gfx** gfxp) {
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Gfx* gfx;
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s32 y;
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s32 y2;
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s32 add;
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s32 uls;
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s32 yinc; // vertical increment amount
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s32 ult;
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s32 lrx;
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s32 lry;
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@ -350,20 +349,23 @@ void func_800C213C(PreRenderContext* this, Gfx** gfxp) {
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}
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uls = 0;
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yinc = 1;
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ult = y2;
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lry = (y2 + add - 1);
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lry = (y2 + add - yinc);
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gDPLoadMultiTile(gfx++, this->fbufSave, 0x0000, G_TX_RENDERTILE, G_IM_FMT_RGBA, G_IM_SIZ_16b, this->width,
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this->height, uls, ult, lrx, lry, 0, G_TX_NOMIRROR | G_TX_WRAP, G_TX_NOMIRROR | G_TX_WRAP,
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G_TX_NOMASK, G_TX_NOMASK, G_TX_NOLOD, G_TX_NOLOD);
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gDPLoadMultiTile(gfx++, this->cvgSave, 0x0160, 1, G_IM_FMT_I, G_IM_SIZ_8b, this->width, this->height, uls, ult,
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do {} while(0); // force register allocation behavior
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gDPLoadMultiTile(gfx++, this->cvgSave, 0x0160, yinc, G_IM_FMT_I, G_IM_SIZ_8b, this->width, this->height, uls, ult,
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lrx, lry, 0, G_TX_NOMIRROR | G_TX_WRAP, G_TX_NOMIRROR | G_TX_WRAP, G_TX_NOMASK, G_TX_NOMASK,
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G_TX_NOLOD, G_TX_NOLOD);
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gSPTextureRectangle(gfx++, uls << 2, ult << 2, (lrx + 1) << 2, (lry + 1) << 2, G_TX_RENDERTILE, uls << 5,
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do {} while(0); // force register allocation behavior
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gSPTextureRectangle(gfx++, uls << 2, ult << 2, (lrx + yinc) << 2, (lry + yinc) << 2, G_TX_RENDERTILE, uls << 5,
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ult << 5, 1 << 10, 1 << 10);
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if (1) {}
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y -= add;
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y2 += add;
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}
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@ -371,9 +373,6 @@ void func_800C213C(PreRenderContext* this, Gfx** gfxp) {
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gDPPipeSync(gfx++);
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*gfxp = gfx;
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}
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#else
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#pragma GLOBAL_ASM("asm/non_matchings/code/PreRender/func_800C213C.s")
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#endif
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void func_800C24BC(PreRenderContext* this, Gfx** gfxp) {
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func_800C0F28(this, gfxp, this->fbufSave, this->fbuf);
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