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0a59863457
The actual boot code (ipl3) is still only incbin'd. If someone else wants to disassemble it properly, go ahead. I might do it eventually, but for now it doesn't seem required for shiftability or anything interesting.
35 lines
860 B
ArmAsm
35 lines
860 B
ArmAsm
.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purposee registers
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.section .text
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glabel entrypoint # 0x80000400
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lui $t0, %hi(_bootSegmentBssStart) # $t0, 0x8001
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addiu $t0, %lo(_bootSegmentBssStart) # addiu $t0, $t0, 0x2370
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li $t1, %lo(_bootSegmentBssSize) # li $t1, 0x4A30
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.L8000040C:
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addi $t1, $t1, -8
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sw $zero, ($t0)
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sw $zero, 4($t0)
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bnez $t1, .L8000040C
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addi $t0, $t0, 8
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lui $t2, %hi(bootproc) # $t2, 0x8000
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lui $sp, %hi(gMainThread) # $sp, 0x8001
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addiu $t2, %lo(bootproc) # addiu $t2, $t2, 0x0498
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jr $t2
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addiu $sp, %lo(gMainThread) # addiu $sp, $sp, 0x2D60
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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