1
0
Fork 0
mirror of https://github.com/zeldaret/oot.git synced 2024-11-25 17:54:15 +00:00
oot/asm
Andrew Zwicky 44dac7af67
ovl_Bg_Ice_Shutter (#377)
* Starting work on Bg_Ice_Shutter, want to commit
before attempting to use the permuter.

* Forgot to use the new UNK_TPYE in DynaPolyInfo_Alloc

* Resolving last asm issues by re-ordering and
updating .c file.

* Attempting to match by reordering things, removing no
longer used .s files from spec file.

* Adding in proper include path for _reloc file

* Removing unneeded parens and casts

* Removing extra space.

* Updated with review fixes

* Another round of review comments.

* Adding description to comment to clarify what these are.

* Adding in newline before draw function
2020-09-19 15:12:42 -04:00
..
non_matchings ovl_Bg_Ice_Shutter (#377) 2020-09-19 15:12:42 -04:00
overlays/data/ovl_map_mark_data Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osDisableInt.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osGetCause.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osGetFpcCsr.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osGetSR.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osProbeTLB.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osRestoreInt.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osSetCompare.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osSetFpcCsr.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osSetSR.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
__osSetWatchLo.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
bcmp.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
bcopy.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
bzero.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
code_800D71F0.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
dmadata.s First proper commit. 2020-03-17 00:31:30 -04:00
entry.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
exceptasm.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
fp.s code_800FCE80 OK 2020-03-21 03:43:48 +01:00
guMtxF2L.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
guMtxIdent.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
guMtxIdentF.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
guNormalize.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
guScale.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
guTranslate.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
ipl3.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
libm.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
mio0.s ucode_disas.c progress (#188) 2020-06-05 13:18:39 -04:00
osGetCount.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osInvalDCache.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osInvalICache.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osMapTLBRdb.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osSetIntMask.s Update asm processor and migrate/improve rodata for a few files (#209) 2020-06-14 19:24:09 -04:00
osUnmapTLBAll.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osWritebackDCache.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
osWritebackDCacheAll.s Properly align asm & data (+ minor fixes) (#165) 2020-05-26 18:09:00 -04:00
rom_header.s Disassemble the rom header and entrypoint function (#87) 2020-04-22 13:44:46 -04:00