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https://github.com/zeldaret/oot.git
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131 lines
5.6 KiB
ArmAsm
131 lines
5.6 KiB
ArmAsm
.include "macro.inc"
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# assembler directives
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.set noat # allow manual use of $at
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.set noreorder # don't insert nops after branches
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.set gp=64 # allow use of 64-bit general purpose registers
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.section .text
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.balign 16
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glabel osPfsFreeBlocks
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/* B771E0 80100040 27BDFEB0 */ addiu $sp, $sp, -0x150
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/* B771E4 80100044 AFBF002C */ sw $ra, 0x2c($sp)
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/* B771E8 80100048 AFB50028 */ sw $s5, 0x28($sp)
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/* B771EC 8010004C AFB40024 */ sw $s4, 0x24($sp)
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/* B771F0 80100050 AFB30020 */ sw $s3, 0x20($sp)
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/* B771F4 80100054 AFB2001C */ sw $s2, 0x1c($sp)
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/* B771F8 80100058 AFB10018 */ sw $s1, 0x18($sp)
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/* B771FC 8010005C AFB00014 */ sw $s0, 0x14($sp)
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/* B77200 80100060 AFA50154 */ sw $a1, 0x154($sp)
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/* B77204 80100064 8C8E0000 */ lw $t6, ($a0)
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/* B77208 80100068 0080A025 */ move $s4, $a0
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/* B7720C 8010006C 00008025 */ move $s0, $zero
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/* B77210 80100070 31CF0001 */ andi $t7, $t6, 1
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/* B77214 80100074 15E00003 */ bnez $t7, .L80100084
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/* B77218 80100078 00000000 */ nop
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/* B7721C 8010007C 1000004D */ b .L801001B4
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/* B77220 80100080 24020005 */ li $v0, 5
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.L80100084:
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/* B77224 80100084 0C040AFC */ jal func_80102BF0
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/* B77228 80100088 02802025 */ move $a0, $s4
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/* B7722C 8010008C 50400004 */ beql $v0, $zero, .L801000A0
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/* B77230 80100090 92980064 */ lbu $t8, 0x64($s4)
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/* B77234 80100094 10000048 */ b .L801001B8
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/* B77238 80100098 8FBF002C */ lw $ra, 0x2c($sp)
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/* B7723C 8010009C 92980064 */ lbu $t8, 0x64($s4)
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.L801000A0:
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/* B77240 801000A0 00009825 */ move $s3, $zero
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/* B77244 801000A4 24150080 */ li $s5, 128
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/* B77248 801000A8 1B00003E */ blez $t8, .L801001A4
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/* B7724C 801000AC 27B20148 */ addiu $s2, $sp, 0x148
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/* B77250 801000B0 24110003 */ li $s1, 3
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.L801000B4:
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/* B77254 801000B4 02802025 */ move $a0, $s4
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/* B77258 801000B8 27A50048 */ addiu $a1, $sp, 0x48
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/* B7725C 801000BC 00003025 */ move $a2, $zero
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/* B77260 801000C0 0C040B31 */ jal func_80102CC4
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/* B77264 801000C4 326700FF */ andi $a3, $s3, 0xff
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/* B77268 801000C8 10400003 */ beqz $v0, .L801000D8
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/* B7726C 801000CC 00000000 */ nop
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/* B77270 801000D0 10000039 */ b .L801001B8
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/* B77274 801000D4 8FBF002C */ lw $ra, 0x2c($sp)
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.L801000D8:
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/* B77278 801000D8 5A600004 */ blezl $s3, .L801000EC
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/* B7727C 801000DC 8E850060 */ lw $a1, 0x60($s4)
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/* B77280 801000E0 10000002 */ b .L801000EC
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/* B77284 801000E4 24050001 */ li $a1, 1
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/* B77288 801000E8 8E850060 */ lw $a1, 0x60($s4)
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.L801000EC:
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/* B7728C 801000EC 28A10080 */ slti $at, $a1, 0x80
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/* B77290 801000F0 10200026 */ beqz $at, .L8010018C
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/* B77294 801000F4 00A01825 */ move $v1, $a1
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/* B77298 801000F8 02A53023 */ subu $a2, $s5, $a1
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/* B7729C 801000FC 30D90003 */ andi $t9, $a2, 3
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/* B772A0 80100100 1320000C */ beqz $t9, .L80100134
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/* B772A4 80100104 03252021 */ addu $a0, $t9, $a1
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/* B772A8 80100108 00054040 */ sll $t0, $a1, 1
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/* B772AC 8010010C 27A90048 */ addiu $t1, $sp, 0x48
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/* B772B0 80100110 01091021 */ addu $v0, $t0, $t1
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.L80100114:
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/* B772B4 80100114 944A0000 */ lhu $t2, ($v0)
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/* B772B8 80100118 24630001 */ addiu $v1, $v1, 1
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/* B772BC 8010011C 162A0002 */ bne $s1, $t2, .L80100128
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/* B772C0 80100120 00000000 */ nop
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/* B772C4 80100124 26100001 */ addiu $s0, $s0, 1
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.L80100128:
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/* B772C8 80100128 1483FFFA */ bne $a0, $v1, .L80100114
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/* B772CC 8010012C 24420002 */ addiu $v0, $v0, 2
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/* B772D0 80100130 10750016 */ beq $v1, $s5, .L8010018C
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.L80100134:
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/* B772D4 80100134 00035840 */ sll $t3, $v1, 1
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/* B772D8 80100138 27AC0048 */ addiu $t4, $sp, 0x48
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/* B772DC 8010013C 016C1021 */ addu $v0, $t3, $t4
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/* B772E0 80100140 944D0000 */ lhu $t5, ($v0)
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.L80100144:
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/* B772E4 80100144 562D0003 */ bnel $s1, $t5, .L80100154
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/* B772E8 80100148 944E0002 */ lhu $t6, 2($v0)
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/* B772EC 8010014C 26100001 */ addiu $s0, $s0, 1
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/* B772F0 80100150 944E0002 */ lhu $t6, 2($v0)
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.L80100154:
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/* B772F4 80100154 562E0003 */ bnel $s1, $t6, .L80100164
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/* B772F8 80100158 944F0004 */ lhu $t7, 4($v0)
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/* B772FC 8010015C 26100001 */ addiu $s0, $s0, 1
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/* B77300 80100160 944F0004 */ lhu $t7, 4($v0)
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.L80100164:
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/* B77304 80100164 562F0003 */ bnel $s1, $t7, .L80100174
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/* B77308 80100168 94580006 */ lhu $t8, 6($v0)
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/* B7730C 8010016C 26100001 */ addiu $s0, $s0, 1
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/* B77310 80100170 94580006 */ lhu $t8, 6($v0)
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.L80100174:
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/* B77314 80100174 24420008 */ addiu $v0, $v0, 8
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/* B77318 80100178 16380002 */ bne $s1, $t8, .L80100184
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/* B7731C 8010017C 00000000 */ nop
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/* B77320 80100180 26100001 */ addiu $s0, $s0, 1
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.L80100184:
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/* B77324 80100184 5452FFEF */ bnel $v0, $s2, .L80100144
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/* B77328 80100188 944D0000 */ lhu $t5, ($v0)
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.L8010018C:
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/* B7732C 8010018C 92880064 */ lbu $t0, 0x64($s4)
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/* B77330 80100190 26730001 */ addiu $s3, $s3, 1
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/* B77334 80100194 327900FF */ andi $t9, $s3, 0xff
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/* B77338 80100198 0328082A */ slt $at, $t9, $t0
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/* B7733C 8010019C 1420FFC5 */ bnez $at, .L801000B4
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/* B77340 801001A0 03209825 */ move $s3, $t9
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.L801001A4:
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/* B77344 801001A4 8FAA0154 */ lw $t2, 0x154($sp)
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/* B77348 801001A8 00104A00 */ sll $t1, $s0, 8
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/* B7734C 801001AC 00001025 */ move $v0, $zero
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/* B77350 801001B0 AD490000 */ sw $t1, ($t2)
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.L801001B4:
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/* B77354 801001B4 8FBF002C */ lw $ra, 0x2c($sp)
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.L801001B8:
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/* B77358 801001B8 8FB00014 */ lw $s0, 0x14($sp)
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/* B7735C 801001BC 8FB10018 */ lw $s1, 0x18($sp)
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/* B77360 801001C0 8FB2001C */ lw $s2, 0x1c($sp)
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/* B77364 801001C4 8FB30020 */ lw $s3, 0x20($sp)
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/* B77368 801001C8 8FB40024 */ lw $s4, 0x24($sp)
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/* B7736C 801001CC 8FB50028 */ lw $s5, 0x28($sp)
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/* B77370 801001D0 03E00008 */ jr $ra
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/* B77374 801001D4 27BD0150 */ addiu $sp, $sp, 0x150
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