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87 lines
2 KiB
C
87 lines
2 KiB
C
#ifndef _ULTRA64_OS_PI_H_
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#define _ULTRA64_OS_PI_H_
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/* Ultra64 Parallel Interface */
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/* Types */
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typedef struct
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{
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/* 0x00 */ u32 errStatus;
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/* 0x04 */ void *dramAddr;
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/* 0x08 */ void *C2Addr;
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/* 0x0C */ u32 sectorSize;
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/* 0x10 */ u32 C1ErrNum;
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/* 0x14 */ u32 C1ErrSector[4];
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} __OSBlockInfo; /* length: 0x24 */
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typedef struct
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{
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/* 0x00 */ u32 cmdType;
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/* 0x04 */ u16 transferMode;
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/* 0x06 */ u16 blockNum;
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/* 0x08 */ s32 sectorNum;
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/* 0x0C */ u32 devAddr;
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/* 0x10 */ u32 bmCtlShadow;
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/* 0x14 */ u32 seqCtlShadow;
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/* 0x18 */ __OSBlockInfo block[2];
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} __OSTranxInfo; /* length: 0x60 */
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typedef struct OSPiHandle_s
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{
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/* 0x00 */ struct OSPiHandle_s *next;
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/* 0x04 */ u8 type;
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/* 0x05 */ u8 latency;
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/* 0x06 */ u8 pageSize;
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/* 0x07 */ u8 relDuration;
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/* 0x08 */ u8 pulse;
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/* 0x09 */ u8 domain;
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/* 0x0A padding */
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/* 0x0B padding */
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/* 0x0C */ u32 baseAddress;
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/* 0x10 */ u32 speed;
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/* 0x14 */ __OSTranxInfo transferInfo;
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} OSPiHandle; /* length: 0x74 */
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typedef struct
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{
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u8 type;
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u32 address;
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} OSPiInfo;
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typedef struct
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{
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/* 0x00 */ u16 type;
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/* 0x02 */ u8 pri;
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/* 0x03 */ u8 status;
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/* 0x04 */ OSMesgQueue *retQueue;
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} OSIoMesgHdr; /* length: 0x8 */
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typedef struct
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{
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/*0x00*/ OSIoMesgHdr hdr;
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/*0x08*/ void *dramAddr;
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/*0x0C*/ u32 devAddr;
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/*0x10*/ size_t size;
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/*0x14*/ OSPiHandle* piHandle; //from the official definition
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} OSIoMesg; /* length: 0x18 */
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/* Definitions */
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#define OS_READ 0 // device -> RDRAM
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#define OS_WRITE 1 // device <- RDRAM
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#define OS_MESG_PRI_NORMAL 0
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#define OS_MESG_PRI_HIGH 1
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/* Functions */
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s32 osPiStartDma(OSIoMesg *mb, s32 priority, s32 direction,
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u32 devAddr, void *vAddr, size_t nbytes, OSMesgQueue *mq);
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void osCreatePiManager(OSPri pri, OSMesgQueue *cmdQ, OSMesg *cmdBuf,
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s32 cmdMsgCnt);
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OSMesgQueue *osPiGetCmdQueue(void);
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s32 osPiWriteIo(u32 devAddr, u32 data);
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s32 osPiReadIo(u32 devAddr, u32 *data);
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#endif
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