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7334ffa373
* Format all handwritten asm and document some * Use c preprocessor for constants * Fix * Fix PI_STATUS_ERROR, some label improvements * Avoid hi/lo for constants * Some more comments * Properly mark functions as functions and their sizes * Fix merge * Improvements * Review suggestions, rework procedure start/end macros to be more like libreultra * Move IPL3 symbol definitions into ipl3.s * Fix undefined_syms, add include and language guards to asm.h and fix the comment in gbi.h * Consistent hex capitalization, add some MIPS builtin defines to CC_CHECK to behave properly * Add -no-pad-sections assembler option and clean up alignment in gu files and bzero * Further suggestions and improvements * Matrix conversion function clarifications * Fix passing AVOID_UB to gcc * Suggestions * Suggestions, global interrupt mask improvements * Further suggestions, interrupt mask comments * Comments fixes, rdb.h * Switch from # comments to // comments, remove unnecesary .set gp=64 directives * Further review suggestions * Missed one
60 lines
1.5 KiB
ArmAsm
60 lines
1.5 KiB
ArmAsm
#include "ultra64/asm.h"
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#include "ultra64/r4300.h"
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.set noat
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.set noreorder
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.section .text
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.balign 16
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/**
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* void osWritebackDCache(void* vaddr, s32 nbytes);
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*
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* Writes back the contents of the data cache to main memory for `nbytes` at `vaddr`.
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* If `nbytes` is as large as or larger than the data cache size, the entire cache is
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* written back.
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*/
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LEAF(osWritebackDCache)
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// If the amount to write back is less than or equal to 0, return immediately
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blez $a1, .ret
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nop
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// If the amount to write back is as large as or larger than
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// the data cache size, write back all
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li $t3, DCACHE_SIZE
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sltu $at, $a1, $t3
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beqz $at, .all
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nop
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// ensure end address doesn't wrap around and end up smaller
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// than the start address
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move $t0, $a0
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addu $t1, $a0, $a1
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sltu $at, $t0, $t1
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beqz $at, .ret
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nop
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// Mask and subtract to align to cache line
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andi $t2, $t0, DCACHE_LINEMASK
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addiu $t1, $t1, -DCACHE_LINESIZE
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subu $t0, $t0, $t2
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1:
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cache (CACH_PD | C_HWB), ($t0)
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sltu $at, $t0, $t1
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bnez $at, 1b
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addiu $t0, $t0, DCACHE_LINESIZE
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.ret:
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jr $ra
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nop
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// same as osWritebackDCacheAll in operation
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.all:
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li $t0, K0BASE
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addu $t1, $t0, $t3
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addiu $t1, $t1, -DCACHE_LINESIZE
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1:
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cache (CACH_PD | C_IWBINV), ($t0)
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sltu $at, $t0, $t1
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bnez $at, 1b
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addiu $t0, DCACHE_LINESIZE
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jr $ra
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nop
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END(osWritebackDCache)
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