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Merge pull request #118 from X0rg/master

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Update CPUs database
This commit is contained in:
Veselin Georgiev 2018-10-22 18:17:02 +03:00 committed by GitHub
commit 3a82b47b1f
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2 changed files with 24 additions and 5 deletions
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23
libcpuid/recog_amd.c
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@ -50,9 +50,12 @@ enum _amd_model_codes_t {
_1500,
_1600,
_1900,
_2200,
_2400,
_2500,
_2600,
_2700,
_2800,
};
@ -274,23 +277,32 @@ const struct match_entry_t cpudb_amd[] = {
{ 15, 0, -1, 22, 48, 4, -1, -1, FUSION_A, 0 , 0, "Mullins X4" },
/* Family 17h: Zen Architecture (2017) */
{ 15, -1, -1, 23, 1, 16, -1, -1, NC, 0 , 0, "Threadripper (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 12, -1, -1, NC, 0 , 0, "Threadripper (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , _1900, "Threadripper (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 16, -1, -1, NC, 0 , 0, "Threadripper (Whitehaven)" },
{ 15, -1, -1, 23, 1, 12, -1, -1, NC, 0 , 0, "Threadripper (Whitehaven)" },
{ 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , _1900, "Threadripper (Whitehaven)" },
{ 15, -1, -1, 23, 1, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 6, -1, -1, NC, 0 , _1600, "Ryzen 5 (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , _1500, "Ryzen 5 (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , _1400, "Ryzen 5 (Summit Ridge)" },
{ 15, -1, -1, 23, 1, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Summit Ridge)" },
/* APUs */
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2800, "Ryzen 7 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2700, "Ryzen 7 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2600, "Ryzen 5 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2500, "Ryzen 5 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , _2400, "Ryzen 5 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , 0, "Ryzen 3 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , _2200, "Ryzen 3 (Raven Ridge)" },
{ 15, -1, -1, 23, 17, 2, -1, -1, NC, 0 , 0, "Athlon (Raven Ridge)" },
/* 2nd-gen, Zen+ (2018): */
{ 15, -1, -1, 23, 8, 32, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" },
{ 15, -1, -1, 23, 8, 24, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" },
{ 15, -1, -1, 23, 8, 16, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" },
{ 15, -1, -1, 23, 8, 12, -1, -1, NC, 0 , 0, "Threadripper (Colfax)" },
{ 15, -1, -1, 23, 8, 8, -1, -1, NC, 0 , 0, "Ryzen 7 (Pinnacle Ridge)" },
{ 15, -1, -1, 23, 8, 6, -1, -1, NC, 0 , 0, "Ryzen 5 (Pinnacle Ridge)" },
{ 15, -1, -1, 23, 8, 4, -1, -1, NC, 0 , _2500, "Ryzen 5 (Pinnacle Ridge)" },
{ 15, -1, -1, 23, 8, 4, -1, -1, NC, 0 , 0, "Ryzen 3 (Pinnacle Ridge)" },
/* Newer Opterons: */
@ -483,9 +495,12 @@ static int decode_amd_ryzen_model_code(const char* bs)
int model_code;
const char* match_str;
} patterns[] = {
{ _2800, "2800" },
{ _2700, "2700" },
{ _2600, "2600" },
{ _2500, "2500" },
{ _2400, "2400" },
{ _2200, "2200" },
{ _1900, "1900" },
{ _1600, "1600" },
{ _1500, "1500" },

6
libcpuid/recog_intel.c
View file

@ -348,11 +348,15 @@ const struct match_entry_t cpudb_intel[] = {
{ 6, 14, -1, -1, 142, 2, -1, -1, NC, CELERON_ , 0, "Kaby Lake-U (Celeron)" },
{ 6, 14, -1, -1, 142, 2, -1, -1, NC, CORE_|_M_|_3 , 0, "Kaby Lake-U (Core m3)" },
/* Coffee Lake CPUs (14nm): */
{ 6, 14, -1, -1, 158, 8, -1, -1, NC, CORE_|_I_|_9 , 0, "Coffee Lake (Core i9)" },
{ 6, 14, -1, -1, 158, 8, -1, -1, NC, CORE_|_I_|_7 , 0, "Coffee Lake (Core i7)" },
{ 6, 14, -1, -1, 158, 6, -1, -1, NC, CORE_|_I_|_7 , 0, "Coffee Lake (Core i7)" },
{ 6, 14, -1, -1, 158, 6, -1, -1, NC, CORE_|_I_|_5 , 0, "Coffee Lake (Core i5)" },
{ 6, 14, -1, -1, 158, 4, -1, -1, NC, CORE_|_I_|_3 , 0, "Coffee Lake (Core i3)" },
{ 6, 14, -1, -1, 158, 2, -1, -1, NC, PENTIUM_ , 0, "Coffee Lake (Pentium)" },
{ 6, 14, -1, -1, 158, 2, -1, -1, NC, CELERON_ , 0, "Coffee Lake (Celeron)" },
/* Itaniums */
{ 7, -1, -1, -1, -1, 1, -1, -1, NC, 0 , 0, "Itanium" },