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Add detection support for the AMD TBM instructions. Update Vishera test.
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2 changed files with 2 additions and 1 deletions
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@ -295,6 +295,7 @@ static void load_amd_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
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{ 12, CPU_FEATURE_SKINIT },
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{ 13, CPU_FEATURE_WDT },
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{ 16, CPU_FEATURE_FMA4 },
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{ 21, CPU_FEATURE_TBM },
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};
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const struct feature_map_t matchtable_edx87[] = {
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{ 0, CPU_FEATURE_TS },
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@ -90,4 +90,4 @@ intel_fn11[3]=00000000 00000000 00000000 00000000
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64
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128 (authoritative)
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Vishera X4
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 f16c cpb aperfmperf bmi1
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht pni pclmul monitor ssse3 cx16 sse4_1 sse4_2 syscall popcnt aes xsave osxsave avx mmxext nx fxsr_opt rdtscp lm lahf_lm cmp_legacy svm abm misalignsse sse4a 3dnowprefetch osvw ibs skinit wdt ts ttp tm_amd 100mhzsteps hwpstate constant_tsc xop fma3 fma4 tbm f16c cpb aperfmperf bmi1
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