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Related to #91: Make bits available in libcpuid_internal.h

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Along with some interop changes, as the Intel/AMD bits were sometimes
very similar or totally coinciding.
This commit is contained in:
Veselin Georgiev 2017-05-04 03:51:41 +03:00
parent a196e8d1bf
commit 98661492af
4 changed files with 46 additions and 44 deletions
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42
libcpuid/libcpuid_internal.h
View file

@ -58,6 +58,48 @@ struct internal_id_info_t {
int score; // detection (matchtable) score int score; // detection (matchtable) score
}; };
#define LBIT(x) (((long long) 1) << x)
enum _common_bits_t {
_M_ = LBIT( 0 ),
MOBILE_ = LBIT( 1 ),
_MP_ = LBIT( 2 ),
};
// additional detection bits for Intel CPUs:
enum _intel_bits_t {
PENTIUM_ = LBIT( 10 ),
CELERON_ = LBIT( 11 ),
CORE_ = LBIT( 12 ),
_I_ = LBIT( 13 ),
_3 = LBIT( 14 ),
_5 = LBIT( 15 ),
_7 = LBIT( 16 ),
XEON_ = LBIT( 17 ),
ATOM_ = LBIT( 18 ),
};
typedef enum _intel_bits_t intel_bits_t;
enum _amd_bits_t {
ATHLON_ = LBIT( 10 ),
_XP_ = LBIT( 11 ),
DURON_ = LBIT( 12 ),
SEMPRON_ = LBIT( 13 ),
OPTERON_ = LBIT( 14 ),
TURION_ = LBIT( 15 ),
_LV_ = LBIT( 16 ),
_64_ = LBIT( 17 ),
_X2 = LBIT( 18 ),
_X3 = LBIT( 19 ),
_X4 = LBIT( 20 ),
_X6 = LBIT( 21 ),
_FX = LBIT( 22 ),
_APU_ = LBIT( 23 ),
};
typedef enum _amd_bits_t amd_bits_t;
int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data, int cpu_ident_internal(struct cpu_raw_data_t* raw, struct cpu_id_t* data,
struct internal_id_info_t* internal); struct internal_id_info_t* internal);

2
libcpuid/libcpuid_util.h
View file

@ -28,8 +28,6 @@
#define COUNT_OF(array) (sizeof(array) / sizeof(array[0])) #define COUNT_OF(array) (sizeof(array) / sizeof(array[0]))
#define LBIT(x) (((long long) 1) << x)
struct feature_map_t { struct feature_map_t {
unsigned bit; unsigned bit;
cpu_feature_t feature; cpu_feature_t feature;

21
libcpuid/recog_amd.c
View file

@ -44,27 +44,6 @@ struct amd_code_and_bits_t {
uint64_t bits; uint64_t bits;
}; };
enum _amd_bits_t {
ATHLON_ = LBIT( 0 ),
_XP_ = LBIT( 1 ),
_M_ = LBIT( 2 ),
_MP_ = LBIT( 3 ),
MOBILE_ = LBIT( 4 ),
DURON_ = LBIT( 5 ),
SEMPRON_ = LBIT( 6 ),
OPTERON_ = LBIT( 7 ),
TURION_ = LBIT( 8 ),
_LV_ = LBIT( 9 ),
_64_ = LBIT( 10 ),
_X2 = LBIT( 11 ),
_X3 = LBIT( 12 ),
_X4 = LBIT( 13 ),
_X6 = LBIT( 14 ),
_FX = LBIT( 15 ),
_APU_ = LBIT( 16 ),
};
typedef enum _amd_bits_t amd_bits_t;
enum _amd_model_codes_t { enum _amd_model_codes_t {
// Only for Ryzen CPUs: // Only for Ryzen CPUs:
_1400, _1400,

25
libcpuid/recog_intel.c
View file

@ -59,23 +59,6 @@ enum _intel_model_t {
}; };
typedef enum _intel_model_t intel_model_t; typedef enum _intel_model_t intel_model_t;
enum _intel_bits_t {
PENTIUM_ = LBIT( 0 ),
CELERON_ = LBIT( 1 ),
MOBILE_ = LBIT( 2 ),
CORE_ = LBIT( 3 ),
_I_ = LBIT( 4 ),
_M_ = LBIT( 5 ),
_3 = LBIT( 6 ),
_5 = LBIT( 7 ),
_7 = LBIT( 8 ),
XEON_ = LBIT( 9 ),
_MP = LBIT( 10 ),
ATOM_ = LBIT( 11 ),
};
typedef enum _intel_bits_t intel_bits_t;
const struct match_entry_t cpudb_intel[] = { const struct match_entry_t cpudb_intel[] = {
{ -1, -1, -1, -1, -1, 1, -1, -1, NC, 0 , 0, "Unknown Intel CPU" }, { -1, -1, -1, -1, -1, 1, -1, -1, NC, 0 , 0, "Unknown Intel CPU" },
@ -158,11 +141,11 @@ const struct match_entry_t cpudb_intel[] = {
{ 15, 0, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Foster)" }, { 15, 0, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Foster)" },
{ 15, 1, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Foster)" }, { 15, 1, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Foster)" },
{ 15, 2, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Prestonia)" }, { 15, 2, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Prestonia)" },
{ 15, 2, -1, 15, -1, 1, -1, -1, NC, XEON_|_MP , 0, "Xeon (Gallatin)" }, { 15, 2, -1, 15, -1, 1, -1, -1, NC, XEON_|_MP_ , 0, "Xeon (Gallatin)" },
{ 15, 3, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Nocona)" }, { 15, 3, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Nocona)" },
{ 15, 4, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Nocona)" }, { 15, 4, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Nocona)" },
{ 15, 4, -1, 15, -1, 1, -1, -1, IRWIN, XEON_ , 0, "Xeon (Irwindale)" }, { 15, 4, -1, 15, -1, 1, -1, -1, IRWIN, XEON_ , 0, "Xeon (Irwindale)" },
{ 15, 4, -1, 15, -1, 1, -1, -1, NC, XEON_|_MP , 0, "Xeon (Cranford)" }, { 15, 4, -1, 15, -1, 1, -1, -1, NC, XEON_|_MP_ , 0, "Xeon (Cranford)" },
{ 15, 4, -1, 15, -1, 1, -1, -1, POTOMAC, XEON_ , 0, "Xeon (Potomac)" }, { 15, 4, -1, 15, -1, 1, -1, -1, POTOMAC, XEON_ , 0, "Xeon (Potomac)" },
{ 15, 6, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Dempsey)" }, { 15, 6, -1, 15, -1, 1, -1, -1, NC, XEON_ , 0, "Xeon (Dempsey)" },
@ -668,7 +651,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
const struct { uint64_t bit; const char* search; } bit_matchtable[] = { const struct { uint64_t bit; const char* search; } bit_matchtable[] = {
{ XEON_, "Xeon" }, { XEON_, "Xeon" },
{ _MP, " MP" }, { _MP_, " MP" },
{ ATOM_, "Atom(TM) CPU" }, { ATOM_, "Atom(TM) CPU" },
{ MOBILE_, "Mobile" }, { MOBILE_, "Mobile" },
{ CELERON_, "Celeron" }, { CELERON_, "Celeron" },
@ -710,7 +693,7 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
/* restrict by family, since later Xeons also have L3 ... */ /* restrict by family, since later Xeons also have L3 ... */
code = IRWIN; code = IRWIN;
} }
if (match_all(bits, XEON_ + _MP) && data->l3_cache > 0) if (match_all(bits, XEON_ + _MP_) && data->l3_cache > 0)
code = POTOMAC; code = POTOMAC;
if (code == CORE_SOLO) { if (code == CORE_SOLO) {
s = strstr(bs, "CPU"); s = strstr(bs, "CPU");