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DB: use correct _intel_model_t enum value for Meteor Lake CPUs

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The Tumultuous Unicorn Of Darkness 2024-11-30 12:18:41 +01:00
parent a7d5f29ace
commit d5a82d6f64
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1 changed files with 8 additions and 8 deletions
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libcpuid/recog_intel.c
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@ -72,7 +72,7 @@ enum _intel_model_t {
_x3xx, /* Xeon Bronze/Silver/Gold/Platinum x3xx */ _x3xx, /* Xeon Bronze/Silver/Gold/Platinum x3xx */
_x4xx, /* Xeon Bronze/Silver/Gold/Platinum/Max x4xx */ _x4xx, /* Xeon Bronze/Silver/Gold/Platinum/Max x4xx */
_x5xx, /* Xeon Bronze/Silver/Gold/Platinum x5xx */ _x5xx, /* Xeon Bronze/Silver/Gold/Platinum x5xx */
_1xx, /* Core Ultra [579] 1xx */ _1xx, /* Core Ultra [3579] 1xx */
}; };
typedef enum _intel_model_t intel_model_t; typedef enum _intel_model_t intel_model_t;
@ -545,12 +545,12 @@ const struct match_entry_t cpudb_intel[] = {
{ 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_SILVER_ , _x5xx, "Emerald Rapids-SP (Xeon Silver)" }, // Xeon Silver (4500) { 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_SILVER_ , _x5xx, "Emerald Rapids-SP (Xeon Silver)" }, // Xeon Silver (4500)
{ 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_BRONZE_ , _x5xx, "Emerald Rapids-SP (Xeon Bronze)" }, // Xeon Bronze (3500) { 6, 15, -1, -1, 207, -1, -1, -1, NC, XEON_|_BRONZE_ , _x5xx, "Emerald Rapids-SP (Xeon Bronze)" }, // Xeon Bronze (3500)
/* Meteor Lake CPUs (2023, 1st Core Ultra gen, Intel 4) => https://en.wikichip.org/wiki/intel/microarchitectures/meteor_lake */ /* Meteor Lake CPUs (2023, Core Ultra Series 1 processors, Intel 4) => https://en.wikichip.org/wiki/intel/microarchitectures/meteor_lake */
{ 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_9|_H, _x1xx, "Meteor Lake-H (Core Ultra 9)" }, { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_9|_H, _1xx, "Meteor Lake-H (Core Ultra 9)" },
{ 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_H, _x1xx, "Meteor Lake-H (Core Ultra 7)" }, { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_H, _1xx, "Meteor Lake-H (Core Ultra 7)" },
{ 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_H, _x1xx, "Meteor Lake-H (Core Ultra 5)" }, { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_H, _1xx, "Meteor Lake-H (Core Ultra 5)" },
{ 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_U, _x1xx, "Meteor Lake-U (Core Ultra 7)" }, { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_7|_U, _1xx, "Meteor Lake-U (Core Ultra 7)" },
{ 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_U, _x1xx, "Meteor Lake-U (Core Ultra 5)" }, { 6, 10, -1, -1, 170, -1, -1, -1, NC, CORE_|_ULTRA_|_5|_U, _1xx, "Meteor Lake-U (Core Ultra 5)" },
/* F M S EF EM #cores L2$ L3$ BC ModelBits ModelCode Name */ /* F M S EF EM #cores L2$ L3$ BC ModelBits ModelCode Name */
@ -943,7 +943,7 @@ static intel_model_t get_model_code(struct cpu_id_t* data)
if ((bs[i] == '1') && (bs[i+1] == '4')) return _14xxx; if ((bs[i] == '1') && (bs[i+1] == '4')) return _14xxx;
return UNKNOWN; return UNKNOWN;
} }
else if ((i = match_pattern(bs, "Core(TM) Ultra [579]")) != 0) { else if ((i = match_pattern(bs, "Core(TM) Ultra [3579]")) != 0) {
i += 16; i += 16;
if (i + 3 >= l) return UNKNOWN; if (i + 3 >= l) return UNKNOWN;
if (bs[i] == '1') return _1xx; if (bs[i] == '1') return _1xx;