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Update match_entry_t to remove internal codes and bits

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Remove brand_code, model_bits and model_code fields, add a new brand sub-struct.

There fields were complicated to manage, adding complex functions to make it work.
amd_bits_t and intel_bits_t enums were truncated, I had to replace them with #define in 2e01aa0303.

Some of these #define were conflicting with other C headers (ctype.h on OpenBSD, corecrt_wctype.h on Windows), that is why I wanted to get rid of it.

I updated some CPU codenames meanwhile for more consistency.

Fix #212.
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The Tumultuous Unicorn Of Darkness 2025-04-26 19:46:37 +02:00
commit dc06877f4f
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144 changed files with 1018 additions and 2070 deletions
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tests/intel/x86-64/sandy-bridge/ivy-bridge-core-i3.test
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Core i3 (Ivy Bridge)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd popcnt xsave osxsave avx rdtscp lm lahf_lm constant_tsc f16c

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tests/intel/x86-64/sandy-bridge/ivy-bridge-core-i5.test
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@ -102,5 +102,5 @@ general
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128 (non-authoritative)
Ivy Bridge (Core i5)
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc f16c rdrand

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tests/intel/x86-64/sandy-bridge/ivy-bridge-xeon-e5.test
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Ivy Bridge-E (Xeon)
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 xd popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc f16c rdrand x2apic

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tests/intel/x86-64/sandy-bridge/sandy-bridge-celeron.test
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Sandy Bridge (Celeron)
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fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt xsave rdtscp lm lahf_lm constant_tsc

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tests/intel/x86-64/sandy-bridge/sandy-bridge-core-i7.test
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@ -102,5 +102,5 @@ general
-1
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128 (non-authoritative)
Sandy Bridge (Core i7)
Core i7 (Sandy Bridge)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 xd popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc

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tests/intel/x86-64/sandy-bridge/sandy-bridge-e-core-i7.test
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@ -102,5 +102,5 @@ general
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128 (non-authoritative)
Sandy Bridge-E (Core i7)
Core i7 Extreme (Sandy Bridge-E)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc x2apic

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tests/intel/x86-64/sandy-bridge/sandy-bridge-e-xeon-e5.test
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@ -102,5 +102,5 @@ general
-1
-1
128 (non-authoritative)
Sandy Bridge-E (Xeon)
Xeon E5 (Sandy Bridge-E)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 xd popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc x2apic

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tests/intel/x86-64/sandy-bridge/sandy-bridge-xeon-e3.test
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@ -110,5 +110,5 @@ general
-1
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128 (non-authoritative)
Sandy Bridge (Xeon)
Xeon E3 (Sandy Bridge)
fpu vme de pse tsc msr pae mce cx8 apic mtrr sep pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pni pclmul dts64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 syscall xd popcnt aes xsave osxsave avx rdtscp lm lahf_lm constant_tsc x2apic